28nm Memory Layout
Silvaco single port and dual port SRAM, 1 port and 2 port register file, and ROM memory compilers have more than 25 years of feature development. Silvaco compilers have been adopted and deployed at over 12 different foundries and IDMs worldwide. They are available in process nodes down to 22nm. Silvaco memory compilers are optimized for high density and low power and enable designers to achieve the optimal trade-off between performance, power, and area.
Silvaco memory compilers are extensively silicon proven, and provide high yield using variation-aware design tools and methodology.