• Analog Custom Design & Analysis Examples

opt_ex25 : SiC DMOS Macromodel Extraction

Requires: Utmost IV, SmartSpice, SmartView

Minimum Versions: Utmost IV 2.24.0.R, SmartSpice 5.4.0.R, SmartView 2.34.0.R

This example describes how to extract a macromodel for a SiC Power DMOS.

The project file opt_ex25.prj and the data file opt_ex25.uds for this example should be loaded into your database. When opened, the project will look as shown in opt_ex25_project.png .

Preliminary information

The netlist of the macromodel is partially illustrated in opt_ex25_netlist.png .

The SiC_MOS subcircuit contains the main section of the macromodel and it includes the following SPICE nonlinear circuit elements:

  • M1: a MOSFET device instance modeled using a BSIM4 model card
  • D1 and D2: two diodes connected between the source and drain of the device, to accurately account for the recovery effect, modeled using diode Level 1 model cards
  • Gd1: A bias-controlled current source, in fact, a bias-dependent and temperature-dependent drain conductance
  • Gs1: A temperature-dependent source conductance
  • Rds1: A constant resistor connected between the drain and source device terminals, to better account for the leakage current of the device
  • Ggd: A bias-controlled current source, in fact a bias-dependent capacitor connected between the gate and drain device terminals
  • Cgs: A constant capacitor connected between the gate and source device terminals
  • Cds: A constant capacitor connected between the drain and source device terminals

These other elements are used in a separate section of the macromodel, to account for the bias-controlled current source Ggd behaving like a capacitor:

  • Cgd1: A constant capacitor
  • Vgd1: A zero-bias voltage source, used as a current probe
  • Egd3: A bias-controlled voltage source, used to implement the bias dependence of Ggd on Vgd

Temperature dependence

Instead of using the built-in temperature dependence parameters of the various model cards and passive components, this example uses an alternative temperature dependence based on additional controlled voltage and current sources. This approach is preferred for power device macromodels, because it can be extended to implement a dynamic circuit temperature dependence, to account for the self-heating phenomenon. The following macromodel elements are used to account for the temperature dependence of other macromodel components.

  • Vprobe1: A zero-bias voltage source, used as a current probe
  • Ed1, Es1, Eg1, Gds1: Bias-controlled sources to account for the temperature dependence of the core MOSFET element M1
  • Edi1: A bias-controlled voltage source, to account for the temperature dependence of the diode D1
  • Edi2: A bias-controlled voltage source, to account for the temperature dependence of the diode D2

Model cards and parameters

The macromodel thus includes 3 compact model cards, db1, db2 and nch1, to describe the circuit elements D1, D2 and M1, respectively: opt_ex25_model_cards.png . Additional netlist parameters are used in the bias dependence equations of various circuit elements: opt_ex25_netlist_parameters.png .

Specific netlist for the Ciss capacitance

The Rext1 and Cext1 circuit elements are required for the proper netlist used for simulating the Ciss capacitance versus drain voltage. When the cissvd_flag attribute is not 0 (Ciss data is used), then Rext1=Rext and Cext1=Cext. When the cissvd_flag attribute is 0, then Rext1=Rmin and Cext1=Cmin.

Model extraction sequence

The extraction and optimization sequence, which fully automates the extraction of this macromodel's parameters, has a total of 51 sections. The objective of each section is to isolate a device characteristic and then to optimize or directly calculate specific model parameters. Some of the model parameters are optimized in multiple sections for better fitting.

Sections 1-3: idvg_rt

The first 3 sections are used to extract a preliminary value of the MOSFET threshold voltage parameter, nch1/VTH0, and to properly set its lower and upper limits: opt_ex25_03.png .

Sections 4-10: idvg_rt, crss

The next 7 sections are used to calculate two important capacitance-related parameters based on the Crss capacitance and its derivative, versus drain voltage data, at room temperature, as seen in the Utmost IV Log view: opt_ex25_10.png .

  • nch1/VOFFCV BSIM4 C-V offset parameter for the weak to strong inversion transition
  • pcgdv Netlist parameter used in the bias dependence of Ggd

Sections 11-13: idvg_rt

This section optimizes the I-V parameters of the MOSFET based on the drain current versus gate voltage characteristic in the linear region and at room temperature. The following model parameters are optimized.

  • PARAMS/PRDWMIN Geometry-independent drain resistance
  • nch1/VTH0 Threshold voltage
  • nch1/U0 Low-field mobility
  • nch1/VOFF I-V offset parameter for the weak to strong inversion transition
  • nch1/MINV I-V coefficient for the weak to strong inversion transition
  • nch1/NFACTOR Subthreshold slope

After these steps have been completed (step idvg_3 has been finished), the fit to measured data will be as shown in opt_ex25_13.png .

Sections 14-17: iv_bd_rt

This section optimizes the I-V parameters of the recovery diodes based on the drain current versus drain voltage characteristic in the third quadrant (negative drain voltage and drain current), at room temperature. The following model parameters are optimized.

  • db1/IS Saturation current of diode db1
  • db1/RS Series resistance of diode db1
  • db1/N Emission coefficient of diode db1
  • db1/IKF Knee current of diode db1
  • db2/IS Saturation current of diode db2
  • db2/RS Series resistance of diode db2
  • db2/IKF Knee current of diode db2

After these steps have been completed (step iv_bd_4 has been finished), the fit to measured data will be as shown in opt_ex25_17.png .

Sections 18-19: idvd_idvg_sat_rt

This section optimizes the I-V parameters of the MOSFET based on the drain current versus drain voltage and drain current versus gate voltage characteristics in the saturation region, at room temperature. The following model parameters are optimized.

  • PARAMS/PRDWMIN Geometry-independent drain resistance
  • nch1/VSAT Saturation velocity
  • nch1/PCLM Channel length modulation parameter

After these steps have been completed (step idvd_idvg_sat_2 has been finished), the fit to measured data will be as shown in opt_ex25_19.png .

Sections 20-21: iv_bd_rt

This section refines the I-V parameters of the recovery diodes based on the drain current versus drain voltage characteristic in the third quadrant (negative drain voltage and drain current), at room temperature. The following model parameters are optimized and refined.

  • db1/IS Saturation current of diode db1
  • db1/RS Series resistance of diode db1
  • db1/N Emission coefficient of diode db1
  • db1/IKF Knee current of diode db1
  • db2/IS Saturation current of diode db2
  • db2/RS Series resistance of diode db2
  • db2/IKF Knee current of diode db2

After these steps have been completed (step iv_bd_4 has been finished), the fit to measured data will be as shown in opt_ex25_21.png .

Sections 22-23: idvd_idvg_sat_bd_rt

This section optimizes the I-V parameters of the MOSFET based on the drain current versus drain voltage and drain current versus gate voltage characteristics in the saturation region, and the drain current versus drain voltage characteristic in the third quadrant (negative drain voltage and drain current), at room temperature. The following model parameters are optimized and refined.

  • PARAMS/PRDWMIN Geometry-independent drain resistance
  • PARAMS/PRSWMIN Geometry-independent source resistance
  • nch1/VSAT Saturation velocity
  • nch1/AGS Vgs dependence of bulk factor
  • nch1/PCLM Channel length modulation parameter

After these steps have been completed (step idvd_idvg_sat_bd_2 has been finished), the fit to measured data will be as shown in opt_ex25_23.png .

Sections 24-26: all_iv_rt

This section optimizes the I-V parameters of the MOSFET based on the drain current versus drain voltage and drain current versus gate voltage characteristics in the saturation and linear region, and the drain current versus drain voltage characteristic in the third quadrant (negative drain voltage and drain current), at room temperature. The following model parameters are optimized and refined.

  • PARAMS/PRDWMIN Geometry-independent drain resistance
  • PARAMS/PRSWMIN Geometry-independent source resistance
  • nch1/VTH0 Threshold voltage
  • nch1/U0 Low-field mobility
  • nch1/UA First-order mobility degradation coefficient due to vertical electric field
  • nch1/VSAT Saturation velocity
  • nch1/AGS Vgs dependence of bulk factor
  • nch1/VOFF I-V offset parameter for the weak to strong inversion transition
  • nch1/MINV I-V coefficient for the weak to strong inversion transition
  • nch1/NFACTOR Subthreshold slope
  • nch1/PCLM Channel length modulation parameter

After these steps have been completed (step iv_3 has been finished), the fit to measured data will be as shown in opt_ex25_26.png .

Section 27: iv_bd_rt

This section refines the I-V parameters of the recovery diodes based on the drain current versus drain voltage characteristic in the third quadrant (negative drain voltage and drain current), at room temperature. The following model parameters are refined.

  • db1/IS Saturation current of diode db1
  • db1/RS Series resistance of diode db1
  • db1/N Emission coefficient of diode db1
  • db1/IKF Knee current of diode db1
  • db2/IS Saturation current of diode db2
  • db2/RS Series resistance of diode db2
  • db2/IKF Knee current of diode db2

After these steps have been completed (step iv_bd_4 has been finished), the fit to measured data will be as shown in opt_ex25_27.png .

Section 28-30: all_cv

This section optimizes the C-V parameters of the recovery diode based on the Cds capacitance versus drain voltage data, at room temperature. The following model parameters are optimized.

  • PARAMS/pcds0 Netlist parameter used for the drain-source parasitic capacitance
  • db1/CJO Zero-bias junction capacitance of diode db1
  • db1/VJ Junction potential barrier of diode db1
  • db1/MJ Junction grading coefficient of diode db1

After these steps have been completed (step cds_vd_3 has been finished), the fit to measured data will be as shown in opt_ex25_30.png .

Section 31-32: all_cv

This section optimizes the C-V parameters of various macromodel components, based on a combination of Cds, Coss, Crss and Ciss capacitances versus drain voltage data, at room temperature. The following model parameters are optimized and refined.

  • PARAMS/pcgd0 Netlist parameter used in the bias dependence of Ggd
  • PARAMS/pcgd11 Netlist parameter used in the bias dependence of Ggd
  • PARAMS/pcgd12 Netlist parameter used in the bias dependence of Ggd
  • PARAMS/pcgs0 Netlist parameter used for the gate-source parasitic capacitance
  • nch1/DLC Effective length offset for the MOSFET C-V model
  • nch1/VOFFCV MOSFET C-V offset parameter for the weak to strong inversion transition

After these steps have been completed (step all_cvd_2 has been finished), the fit to measured data will be as shown in opt_ex25_32.png .

Section 33: all_cv

This section refines the C-V parameters of various macromodel components, based on the Crss capacitance versus drain voltage data, at room temperature. The following model parameters are refined.

  • PARAMS/pcgd0 Netlist parameter used in the bias dependence of Ggd
  • PARAMS/pcgd11 Netlist parameter used in the bias dependence of Ggd
  • PARAMS/pcgd12 Netlist parameter used in the bias dependence of Ggd
  • nch1/VOFFCV MOSFET C-V offset parameter for the weak to strong inversion transition

After these steps have been completed (step crss_1 has been finished), the fit to measured data will be as shown in opt_ex25_33.png .

Section 34-35: all_iv_cv_rt

This section refines all previously optimized parameters of various macromodel components, based on combined I-V and C-V characteristics, at room temperature. The following model parameters are refined.

  • PARAMS/pcgd0 Netlist parameter used in the bias dependence of Ggd
  • PARAMS/pcgd11 Netlist parameter used in the bias dependence of Ggd
  • PARAMS/pcgd12 Netlist parameter used in the bias dependence of Ggd
  • PARAMS/pcgs0 Netlist parameter used for the gate-source parasitic capacitance
  • PARAMS/pcds0 Netlist parameter used for the drain-source parasitic capacitance
  • PARAMS/PRDWMIN Geometry-independent drain resistance
  • PARAMS/PRSWMIN Geometry-independent source resistance
  • db1/CJO Zero-bias junction capacitance of diode db1
  • db1/VJ Junction potential barrier of diode db1
  • db1/MJ Junction grading coefficient of diode db1
  • nch1/VTH0 Threshold voltage
  • nch1/U0 Low-field mobility
  • nch1/UA First-order mobility degradation coefficient due to vertical electric field
  • nch1/VSAT Saturation velocity
  • nch1/AGS Vgs dependence of bulk factor
  • nch1/VOFF I-V offset parameter for the weak to strong inversion transition
  • nch1/MINV I-V coefficient for the weak to strong inversion transition
  • nch1/NFACTOR Subthreshold slope
  • nch1/PCLM Channel length modulation parameter
  • nch1/DLC Effective length offset for the MOSFET C-V model
  • nch1/VOFFCV MOSFET C-V offset parameter for the weak to strong inversion transition

After these steps have been completed (step crss_1 has been finished), the fit to measured data will be as shown in opt_ex25_35.png .

Section 36-37: all_cv

This section refines the C-V parameters of various macromodel components, based on the Crss capacitance and its derivative, versus drain voltage data, at room temperature. The following model parameters are refined.

  • PARAMS/pcgd0 Netlist parameter used in the bias dependence of Ggd
  • PARAMS/pcgd11 Netlist parameter used in the bias dependence of Ggd
  • PARAMS/pcgd12 Netlist parameter used in the bias dependence of Ggd
  • nch1/VOFFCV MOSFET C-V offset parameter for the weak to strong inversion transition

After these steps have been completed (step crss_3 has been finished), the fit to measured data will be as shown in opt_ex25_37.png .

Section 38-39: all_cv

This section optimizes the C-V parameters of various macromodel components, based on a combination of Cds, Coss, Crss and Ciss capacitances versus drain voltage data, at room temperature. The following model parameters are optimized and refined.

  • PARAMS/pcgd0 Netlist parameter used in the bias dependence of Ggd
  • PARAMS/pcgd11 Netlist parameter used in the bias dependence of Ggd
  • PARAMS/pcgd12 Netlist parameter used in the bias dependence of Ggd
  • PARAMS/pcgs0 Netlist parameter used for the gate-source parasitic capacitance
  • nch1/DLC Effective length offset for the MOSFET C-V model
  • nch1/VOFFCV MOSFET C-V offset parameter for the weak to strong inversion transition

After these steps have been completed (step all_cvd_4 has been finished), the fit to measured data will be as shown in opt_ex25_39.png .

Section 40-41: all_cv

This section refines the C-V parameters of the recovery diode based on the Cds capacitance versus drain voltage data, at room temperature. The following model parameters are optimized.

  • PARAMS/pcds0 Netlist parameter used for the drain-source parasitic capacitance
  • db1/CJO Zero-bias junction capacitance of diode db1
  • db1/VJ Junction potential barrier of diode db1
  • db1/MJ Junction grading coefficient of diode db1

After these steps have been completed (step cds_vd_3 has been finished), the fit to measured data will be as shown in opt_ex25_41.png .

Section 42-45: iv_bd_rt

This section refines the I-V parameters of the recovery diodes based on the drain current versus drain voltage characteristic in the third quadrant (negative drain voltage and drain current), at room temperature. The following model parameters are refined.

  • db1/IS Saturation current of diode db1
  • db1/RS Series resistance of diode db1
  • db1/N Emission coefficient of diode db1
  • db1/IKF Knee current of diode db1
  • db2/IS Saturation current of diode db2
  • db2/RS Series resistance of diode db2
  • db2/IKF Knee current of diode db2

After these steps have been completed (step iv_bd_6 has been finished), the fit to measured data will be as shown in opt_ex25_45.png .

Section 46-47: all_iv_no_bd_t

This section optimizes the refines the temperature parameters of various macromodel components, based on I-V characteristics, at different temperatures (high and low). The following model parameters are optimized.

  • PARAMS/PEDT1 Netlist parameter used in the bias dependence of Ed1
  • PARAMS/PEGT1 Netlist parameter used in the bias dependence of Eg1
  • PARAMS/PEGT2 Netlist parameter used in the bias dependence of Eg1
  • PARAMS/PGDST1 Netlist parameter used in the bias dependence of Gds1
  • PARAMS/PGRDWT1 Netlist parameter used in the bias dependence of Gd1
  • PARAMS/PGRDWT2 Netlist parameter used in the bias dependence of Gd1
  • PARAMS/PGRSWT1 Netlist parameter used in the bias dependence of Gs1
  • PARAMS/PGRSWT2 Netlist parameter used in the bias dependence of Gs1

After these steps have been completed (step iv_t_2 has been finished), the fit to measured data will be as shown in opt_ex25_47.png .

Section 48-51: iv_bd_t

This section optimizes the temperature parameters of the macromodel components associated with the recovery diodes, based on the drain current versus drain voltage characteristic in the third quadrant (negative drain voltage and drain current), at different temperatures (high and low). The following model parameters are optimized.

  • PARAMS/PEDIT11 Netlist parameter used in the bias dependence of Edi1
  • PARAMS/PEDIT12 Netlist parameter used in the bias dependence of Edi1
  • PARAMS/PEDIT21 Netlist parameter used in the bias dependence of Edi2
  • PARAMS/PEDIT22 Netlist parameter used in the bias dependence of Edi2
  • db1/EG Energy gap of diode db1
  • db2/EG Energy gap of diode db1

After these steps have been completed (step iv_bd_t_4 has been finished), the fit to measured data will be as shown in opt_ex25_51.png .

When complete, the project netlist, model cards and netlist parameters can then be exported into an external model library file.

First, the macromodel netlist is exported. We export the whole netlist under the name SiC_DMOS, as shown in opt_ex25_export_netlist.png . As a result, the exported netlist will include two subcircuits, in a 2-level hierarchy: the top level subcircuit, SiC_DMOS, and the lower level subcircuit, SiC_MOS.

The model cards are then exported into the lower level subcircuit, SiC_DMOS/SiC_MOS, as shown in opt_ex25_export_model_cards.png .

Finally, the netlist parameters are exported. The first 4 parameters, Rmin, Cmin, Rext, Cext that are used to account for the Ciss capacitance-specific netlist, must be exported into the top level subcircuit, SiC_DMOS, as shown in opt_ex25_export_netlist_params_1.png . The other netlist parameters will be exported into the lower level subcircuit, SiC_DMOS/SiC_MOS, as shown in opt_ex25_export_netlist_params_2.png .

For this example, the netlist and the final model card and netlist parameters have been exported in the opt_ex25.libr file.

Additional Info:
Files
opt_ex25.uds
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