• Analog Custom Design & Analysis Examples

    Analog Custom Design & Analysis Examples

002_heiracheal_fast_mode : Fast mode demonstartor

Requires: SmartSpice & Smartview

Minimum Versions: SMARTSPICE 3.16.12.R

  • No example available at present.

In fast mode, SMARTSPICE allows user to efficiently simulate large hierarchical circuits. It uses input data reduction when hierarchy is met in the netlist, and affects only the parser and preprocessor stage.

Use "fast" command key to activate SmartSpice fast mode:

> smartspice -fast

Details can be found in the SmartSpice User Manual 1 Chapter 1.9.

After the simulation completes, the waveforms can be seen as displayed.

Input Files
Graphics
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