• Analog Custom Design & Analysis Examples

    Analog Custom Design & Analysis Examples

002_SS_script : More complex Post-Processing.

Requires: SmartSpice & Smartview

Minimum Versions: SmartSpice 4.30.5.R + SmartView 2.34.3.R

In a flat Panel display there maybe many lines to drive depending on panel size. You can setup a pulsed source for every line but this is very tedious and prone to mistakes. A better approach is to programatically through Verilog-A setup these Pulses as shown in this simple small example that can be expanded to the larger cases.

The data pulses and scan pulses can be setup through simple Verilog-A files that are then used in conjunction with pulse sources to drive the circuit.

This scan plot shows the set of scan pulses generated in this example. You can go on and plot all the generated stimulus waveforms to get this final result of getting all the timing right for a simple 4x5 display case. The driver circuit has to switch cells via long connection lines with parasitic elements that degrade and strech the waveform in time. Here is an example taking a simple pixel design. And using it in a small array(7x13) including parasitic elements. The user can then vary the components and loading to see how the driver timing changes. This can be used as a template for exploring different size arrays and different pixel arrangements.

The input deck is a SPICE file generated from the Gateway schematic shown here .

Input Files
Graphics
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