• Parasitic Extraction Examples

    Utmost IV Examples

07 : Selected Nets Extraction

Minimum Required Versions: Expert Expert 5.2204.3.C, Hipex 3.8.8.R, Guardian 4.8.36.R

Hipex-RC provides ways to reduce the size of a parasitic RC netlist for post layout simulation of a large layout block. One of them is the selected nets extraction function. This function is effective for reducing the run time of Hipex-RC. When this function is used, Hipex-RC extracts parasitic resistors and capacitors only for the selected nets of the critical path.

1. Starting the example

-Load hpx_ex_007.eld

-Open the "vref" cell as shown in figure1.

2. Loading the extraction technology

-Select the menu item Verification->Extraction->Setup , or click the "LPE setup" icon. Select "Technology" and specify the three files in "hipex" folder as shown in figure2.

Make sure the following settings are specified.

Derived layer generation file: hpx_examples_007_lvs.dsf

Parasitic capacitance technology file: hpx_examples_007_c.lisa

Parasitic resistance technology file: hpx_examples_007_r.lisa

-Select the menu item Setup->Technology->Device Setup , and within appeared "Device Setup" dialog select device "IND". Then, go to "File Name" section at the bottom of the dialog, and select file hpx_examples_007.lisa from "hipex" folder. This file contains the definition of the custom device

3. Setting up backannotation to the schematic netlist

Hipex-RC can annotate schematic net names to the parasitic RC netlist for post layout simulation.

Select "Backannotation and LVS" in the "Layout Parameter Extraction Setup" window. Setup the schematic netlist and the LVS settings file as shown in figure3.

Make sure the following settings are specified.

Schematic netlist: vref_lvs.net

LVS settings file: default.gpr

(The LVS settings file is saved in advance when the LVS verification with Guardian LVS is passed).

4. Setting up the selected nets for Hipex-RC

Select "Parasitic Extraction" in the "Layout Parameter Extraction Setup" window. Check the "Selected nets" and "BA names" checkboxes. Add target net names in the schematic as shown in figure4. Namely, select "NET6","NET8", and "VOUT" as the selected nets.

5. Running Hipex-NET and Hipex-RC

Select the menu item Verification->Extraction->Hipex-NET->Run , or click the "Run netlist extractor" icon. A layout netlist is generated as a result.

Then, select Verification->Extraction->Hipex-RC->Run , or click the "Run Hipex-RC" icon. The parasitic RC netlist as shown on figure5 is generated.

The netlist shows the extracted parasitic resistors and capacitors related only to the three nets.

6. About ignore nets setup

Hipex-RC provides not only the selected nets extraction function but also the ignored nets function. When this function is used, Hipex-RC doesn't extract parasitic resistors and capacitors for the ignored nets. An example setup is shown on figure6. This function can be used in the same way as the "selected nets" function, and is just as useful.

Input Files
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