• Parasitic Extraction Examples

    Utmost IV Examples

06 : Netlisting and RC Extraction for Non-Manhattan Geometry Designs

Minimum Required Versions: Expert 5.2204.3.C, Hipex 3.8.8.R

Parasitic resistor and capacitor extraction using Hipex RC is not limited to 90-degree Manhattan layout geometries. Hipex can accurately extract layout parasitic devices on non-Manhattan routing as shown in the following example.

1: Expert and Hipex Setup

Open Expert and load the example circuit in the Expert project hipex_ex06.eld and open the sample layout cell named 45_route. Some of the 45-degree signal routing that will be characterized by Hipex for parasitic resistance and capacitance elements is shown in Figure1 and Figure2.

Next, all extraction decks must be specified in the LPE setup in Expert by selecting Verification->Extraction->Setup , which opens the LPE setup window. Selecting the Technology tab in the left section of the window brings up the dialog box shown in Figure3 , in which the layer generation script ( silvaco_dev_extract.dsf ), the parasitic capacitance script (silvaco_parasitic_c.lisa) , and the parasitic resistance script ( silvaco_parasitic_c.lisa ) must be chosen.

More information regarding other Hipex settings can be found in several of the other Hipex examples.

2: Running Hipex

The derived layers and connectivity for the layout must be generated before parasitic extraction by selecting Verification->Extraction->Hipex-Net->Run from the Expert menu. This step will also produce a layout netlist of the non-parasitic devices.

After running Hipex-Net, three types of parasitic netlists can be generated individually: resistance only, capacitance only, or combined parasitic resistance and capacitance. Each of these options is available in the Verification->Extraction menu.

The parasitic RC netlist for the sample layout 45_route is shown in Figure4.

Input Files
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