Interdigitated back contact silicon heterojunction (IBC-SHJ) combines the advantages of interdigitated back contact (IBC) and silicon heterojunction (SHJ) solar cells. Having all the contacts at the back of the cell eliminates contact shading, leading to a higher short-circuit current (JSC). Being a heterojunction device, IBC-SHJ also has the potential of higher open circuit voltage (VOC) due to the better surface passivation of the deposited amorphous silicon (a-Si) layer. The low temperature deposition, instead of high temperature diffusion, decreases thermal stress, which is the trend of future silicon solar cells. Rear surface passivation by deposited intrinsic amorphous silicon (a-Si) buffer layer in IBC-SHJ solar cells significantly improves open circuit voltage (VOC) and short circuit current (JSC) but can lead to very low fill factor (FF) with an “S” shape J-V curve. In this paper, methods to optimize IBC-SHJ solar cell with improved FF are discussed and guided by two-dimensional numerical simulation. The modeling of the IBC-SHJ solar cell requires device simulation software operating in two dimensions and incorporating amorphous silicon. To study this innovative structure, we use ATLAS two-dimensional (2-D) device simulation software that provides accurate bulk and interface defects needed to model amorphous silicon. We first present the geometrical structure of the solar cell, then review the general framework of the simulation by specifying the different physical models, and finally examine the simulation results in order to determine the important parameters to achieve high efficiency.

Monte Carlo module of Athena allows accurate simulation of ion implantation in 4H-SiC and 6H-SiC [1]. It is known that channeling effects are very pronounced in SiC since its lattice has several wide open channels ( e.g. 〈0001〉, 〈1120〉, and 〈1123〉 for 4H-SiC) and therefore implant profiles strongly depend on wafer orientation and ion beam direction. Another important aspect of ion implantation simulation in SiC is the fact that most of commercially available standard 〈0001〉 wafers are offered with miscut of 3.5° – 8.5° usually toward 〈1120〉 direction. The miscut is introduced primarily to facilitate epitaxial growth. In the same time the miscut alters ion implantation, because implanting normal to the wafer surface is equivalent to a tilt of the beam in the (1120) plane.

In this article the various enhancements to the organic device modeling that have been implemented recently in Atlas are presented. Following the description of the carrier statistics and the new mobility and diffusion models, published data are also reproduced in the final results section.

Silicon has long been the semiconductor of choice for high-voltage power electronics applications [1,2]. However, wide-bandgap semiconductors such as SiC have begun to attract attention because they are projected to have much better performance than silicon [3-7]. In comparison with silicon, wide-bandgap semiconductors offer a lower intrinsic carrier concentration (10 to 35 orders of magnitude), a higher electric breakdown field (4 to 20 times), a higher thermal conductivity (3 to 13 times), and a faster saturated electron drift velocity (2 to 2.5 times).

Different crystal planes of silicon are known to have different oxidation rates, e.g. the silicon plane with Miller indices <111> is oxidized approximately 1.7 times faster then the <100> plane [1][2]. During an oxidation process the geometry of a 3D structure may change significantly and the silicon/oxide interface may pass through various crystal planes with different oxidation rates. Therefore, the orientation and type of the silicon wafer affects the resulting geometry of an oxidized structure on this wafer. This paper explains in details how VICTORY Process can be used to model this anisotropic behaviour.