• Simulation Standard Technical Journal

Simulation Standard

Technical Journal

A Journal for Process and Device Engineers

Optimization of PD-SOI CMOS Process and Devices for RF Applications

In recent years, radio-frequency (RF) CMOS on Silicon-on-Insulator (SOI) has rapidly evolved as a mainstream technology for switches used in wireless applications such as tuners and power amplifiers [1, 2]. Since such applications can involve switching high power levels at high frequencies (~2 GHz), the technology considerations are substantially different than those for SOI used in high speed, small signal applications such as microprocessors. Requirements of lower insertion loss, better isolation, and better linearity have driven RF CMOS-SOI roadmap.

W-element Field Solvers

In connection with the reduction in the size of electronic elements and the increase in operating frequencies, it becomes necessary to transmit signals between the nodes of the circuit using micro strip transmission lines. . Micro strip is similar to strip line transmission line except that the micro strip is not sandwiched, it is on a surface layer, above a ground plane. A strip line circuit uses a flat strip of metal which is sandwiched between two parallel ground planes. The insulating material of the substrate forms a dielectric. The width of the strip, the thickness of the substrate and the relative permittivity of the substrate determine the characteristic impedance of the strip which is a transmission line. As shown in the diagram, the central conductor need not be equally spaced between the ground planes. In the general case, the dielectric material may be different above and below the central conductor.

SmartSpice Shared Mode API

SmartSpice API, shared mode, was developed in order to provide an easy to use solution for products requiring the analog SPICE core engine as an integral part of their functionality. It is a fast and reliable application programming interface used by several SILVACO’s and customer’s tools. The main idea is to allow a client tool to dynamically link with SPICE shared object from pre-installed SmartSpice release package. For convenience, there is a small static library, called ‘testspice’, which can be used to make integration process seamless. In this article we are going to use this library to demonstrate how to use SPICE shared mode API on simple example. The example is ‘testLiteShared.cpp’ can be found with testspice.

Temperature Properties of Amorphous In-Ga-Zn-O Thin-Film Transistors with a new Mobility Model

Amorphous In-Ga-Zn-O (a-IGZO), which is a typical amorphous oxide conductor (AOS), is considered to be one of the most promising channel materials of thin-film transistors (TFTs) for new flat-panel displays because of the high mobility, the small sub-threshold swing and the low off current [1].

Automated Stress Simulation Interface Between Victory Process and Device

Victory Process now includes the Victory Stress library directly within the process simulator, which removes the necessity to keep switching from process to stress simulators when invoking stress simulations at many steps during process simulation. For standard silicon type processes, the main objective for including stress simulations during process simulation, is to include stress effects in the device simulation. A desirable feature, therefore, is for the stress and strain fields calculated during process simulation, to be carried over automatically into the device simulator. This feature has now been included in Victory Device, and is the subject of this article.

TCAD Simulation of GaN-based Vertical FETs (HEMTs)

Gallium nitride (GaN)-based devices have entered the power electronics market and are showing excellent progress in the medium power conversion application [1]-[5]. For high-power conversion application, devices with vertical geometry are preferred over lateral geometry, since the former allows more current for a given chip area, therefore making it more economical and feasible solution for high-voltage and high-current application [3]. It is generally considered that for high voltage/high current applications (900V/100A), vertical device structures might be more suitable owing to their capability of achieving lower specific on-resistance and high breakdown voltage simultaneously [3, 4].