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Simulation Standard

A Journal for Process and Device Engineers

SimStd Sept2022

User Probes and Arbitrary Parameter Sweeps in Victory Device

One of the new features in Victory Device is the ability to add user managed parameters to a log file. This can be used when sweeping parameters (manually or in a Deckbuild loop), such as doping, stress, or layer thicknesses, to add the swept parameter to a log file. To do so, simply create a USER probe (with an optional name), and set the parameter USER on the MODELS statement to some value. This parameter (and value) will be added to the log file. The available user parameters are USER1, USER2, USER3, and USER4. The following shows a DeckBuild loop (go victoryd) to simulate the effect of varying STRESS_XX on the mobility.

Quantum Transport Simulation at Atomistic Accuracy of a Nanowire FET

The FET physical dimensions continue to shrink to five nm node and below, characterized by new types of architectures with nanosheet (NS) and nanowire (NW) shapes [3]. The present choice of material is made of Si, Ge, or SiGe alloy thanks to their high carrier concentrations. In compliment to III-V technology envisaged for a while, new 2D materials are also investigated (for example, the TMDs monolayers1). Such nanomaterials and nano-architectures require atomistic simulations for at least two crucial reasons: 1) bulk parameters like the effective masses and forbidden bandgap are no longer pertinent quantities, and 2) the wave nature of charge carriers becomes predominant for predicting transport characteristics including scattering events.
Sim Std Jul 2022

2022 TCAD Baseline Release

New Features in the 2022 Baseline Release:
  1. Section 1: Process Simulation – New Features in 2022 Baseline Release
  2. Section 2: Device Simulation – New Features in 2022 Baseline Release
  3. Section 3: Victory Mesh – New Features in 2022 Baseline Release
  4. Section 4: Silver – New Features in 2022 Baseline Release
June 2022 Sim Std Icon

Simulation of the High Temperature Performance of InGaN ‘Topping’ Cells

This work reports on the design of a high efficiency InGaN-based two junction (2J) tandem solar cell via numerical simulation, operating at high temperatures (450o C) and under 200 suns for application in a hybrid concentrating solar thermal (CST) system. To address the polarization and band-offset issues for GaN/InGaN heterojunction solar cells, band engineering techniques are employed. A simple interlayer is proposed at the hetero-interface rather than using an In composition grading layer, which is difficult to fabricate. The base absorber thickness and doping concentration have been optimized for 1J cell performance, and current matching was imposed on the series constrained 2J tandem cell design. The simulation results show that the crystalline quality (short recombination lifetime) of current nitride materials is a critical limiting factor the performance of the 2J cell design at high temperatures. The theoretical conversion efficiency of the best devices can be as high as ~21.8% at 450o C and 200X based on the assumed material parameters.

Investigation of Self-Heating Effects in SOI MOSFETs with Silvaco Numerical Simulation

Self-heating effect may cause over-heated damage and degradation for silicon-on-insulator (SOI) devices, so numerical counting heat generated, and distribution can optimize the radio frequency integrated circuits (RFICs) applications. Both conventional and high resistivity, trap-rich SOI substrates are fabricated to investigate self-heating effects. There are two identical n channel metal-oxide-semiconductor-field-effect transistors (nMOSFETs) placed together to share a common source and the same active silicon region. One MOSFET is biased above threshold voltage and into saturation to heat-up the active region as a heater, and another device is biased into the sub-threshold regime to track the temperature changes as a localized thermometer. Compared to bulk single crystal silicon, the trap-rich SOI substrate consists of a high-defected polysilicon layer, which has introduced between the buried oxide layer and substrate. Due to the grain boundaries, the polysilicon layer has more phonon scattering and less value of thermal conductivity. However, based on the measurement results, two types of substrates SOI devices have similar performance for temperature increased. Therefore, a Silvaco numerical simulation has been issued to analysis the heat flow distribution within the devices and dissipation solution.
Sim Std April 2022

How Can I Remesh a Structure Using a Custom Volume Mesh in Victory Mesh?

Victory Mesh support for line statements lets the user customize the volume mesh used by conformal remesh schemes. The volume mesh data inherited from Victory Process can be replaced with a new volume mesh defined within Victory Mesh, allowing full control over the conformal remesh and generating a mesh suitable for device simulation in Victory Device. In this hints and tips two case studies are discussed. In the first, a solid modeling case will show how a FinFET is made using solid modeling commands, and how a volume mesh generated with line statements in Victory Mesh is used to generate a conformal remesh. A comparison of device simulations with a refined Delaunay mesh is also presented. In the second, a buffered super junction LDMOS is loaded from Victory Process and remeshed using a customized volume grid created with line statements in Victory Mesh.