Bipolar Technology

The full text for most of these papers may be found at the IEEE website at www.ieee.org.

A. S. Zoolfakar, N. A. Shahrol,
“Modelling of NPN Bipolar Junction Transistor Characteristics Using Gummel Plot Technique”,
2010 International Conference on Intelligent Systems, Modelling and Simulation (ISMS), 2010, pp. 396&400.

Muhammad Nawaz,
“On the assessment of few design proposals for 4H-SiC BJTs”,
Microelectronics Journal, In Press, Corrected Proof, Available online 27 July 2010.

Xiang Liu, Jiann-shiun Yuan, Juin J. Liou,
“Electro-thermal stress effect on InGaP/GaAs heterojunction bipolar low-noise amplifier performance”,
Microelectronics Reliability, Vol. 50, Issue 3, March 2010, pp. 365-369.

Y. P. Snitovsky, V. A. Efremov,
“New approach to the manufacturing of power microwave bipolar transistors at an irradiation of ohmic contacts: a computer simulation”,
Proceedings of the SPIE&The International Society for Optical Engineering, Vol. 7377, 2008, pp. 737718.

T. Tauqeer, J. Sexton, F. Amir, M. Missous,
“Two-Dimensional Physical and Numerical Modelling of InP-based Heterojunction Bipolar Transistors”,
Advanced Semiconductor Devices and Microsystems, 2008. ASDAM 2008. International Conference on 12-16 Oct. 2008 pp. 271&274.

Jung-Hui Tsai, I-Hsuan Hsu, Chien-Ming Li, Ning-Xing Su, Yi-Zhen Wu, Yin-Shan Huang,
“Comparison of heterostructure-emitter bipolar transistors (HEBTs) with InGaAs/GaAs superlattice and quantum-well base structures”,
Solid-State Electronics, Vol. 52, Issue 7, July 2008, pp. 1018-1023.

S. Mil’shtein, A. Churi, J. Palma,
“Bipolar transistor with quantum well base”,
Microelectronics Journal, Vol. 39, No. 3-4, March/April 2008, pp. 631-634.

S. Nigrin, G.A. Armstrong and A. Kranti,
“Optimisation of trench isolated bipolar transistors on SOI substrates by 3D electro-thermal simulations”,
Solid-State Electronics, Vol. 51, Issue 9, September 2007, pp. 1221-1228.

J. M. Lopez-Gonzalez ,
“Emitter Pedestal Design of GaInP/GaAs Heterojunction Bipolar Transistors”,
2007 Spanish Conference on Electron Devices, January 2007, pp. 348-350.

Christian Schippel, Jun Fu, Frank Schwierz,
“The influence of collector dopant profile on breakdown voltage and cutoff frequency of Si-based RF bipolar transistors”
Physica Status Solidi (c), Vol. 3, Issue 3, Mar. 2006, pp. 494-498.

N. Rinaldi, V. d’Alessandro,
“Theory of electrothermal behavior of bipolar transistors: Part I&Single-finger devices”
IEEE Transactions on Electron Devices, Vol. 52, Issue 9, September 2005, pp. 2009-2021.

N. Rinaldi, V. d’Alessandro,
“Theory of electrothermal behavior of bipolar transistors: Part II&Two-finger devices”
IEEE Transactions on Electron Devices, Vol. 52, Issue 9, September 2005, pp. 2022-2033.

M. Jagadesh Kumar, C. L. Reddy,
“Realising wide bandgap P-SiC-emitter lateral heterojunction bipolar transistors with low collector-emitter offset voltage and high current gain: A novel proposal using numerical simulation”
IEEE Proceedings: Circuits, Devices and Systems, Vol. 151, Issue 5, October 2004, pp. 399-405.

K. P. Roenker, R. Sampathkumaran, A. Breed,
“Effects of collector heterojunction displacement from its p-n junction on the unilateral power gain at 10 GHz in SiGe HBTs”
Semiconductor Science and Technology, Vol. 19, Issue 9, September 2004, pp. 1131-1137.

M. J. Kumar and V. Parihar,
“Surface accumulation layer transistor (SALTran): A new bipolar transistor for enhanced current gain and reduced hot-carrier degradation”
IEEE Transactions on Device and Materials Reliability, Vol. 4, Issue 3, September 2004, pp. 509-515.

N. D. Jankovic and A. O’Neill,
“2D device-level simulation study of strained-Si pnp heterojunction bipolar transistors on virtual substrates”
Solid-State Electronics, Vol. 48, Issue 2, Feb 2004, pp. 225-230.

C. Piemonte, G. Batignani, S. Bettarini, M. Bondioli, M. Boscardin, L. Bosisio, G. F. Dalla Betta, S. Dittongo, F. Forti, M. Giorgi, P. Gregori, I. Rachevskaia, S. Ronchin, N. Zorzi,
“Characterization of BJT-based particle detectors”
Nuclear Instruments and Methods in Physics Research, Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, Vol. 535, Issue 1-2, December 2004, pp. 433-437.

N. D. Jankovic and A. O’Neill,
“Performance evaluation of SiGe heterojunction bipolar transistors on virtual substrates”
Solid-State Electronics, Vol. 48, Feb 2004, pp. 277-284.

C. H. P. Poa and S. R. P. Silva,
“Effect of conductive filaments on the electron emission properties in cathodes”
Technical Digest of the 17th International Vacuum Nanoelectronics Conference, IVNC 2004, Technical.

A. Chatterjee, B. Bhuva, R. Schrimpf,
“High-speed light modulation in avalanche breakdown mode for Si diodes”
IEEE Electron Device Letters, Vol. 25, Issue 9, September 2004, pp. 628-630.

M. J. Kumar and V. Parihar,
“A new surface accumulation layer transistor(SALTran) concept for current gain enhancement in bipolar transistors”
Proceedings of the IEEE International Conference on VLSI Design, Vol. 17, 2004, pp. 827-831.

B. Schlothmann, R. M. Bertenburg, M. Agethen, P. Velling, W. Brockerhoff, F.-J. Tegude,
“Two-dimensional physical simulation of InGaAs/InP heterostructure bipolar transistors”,
Physica Status Solidi (c), Vol. 0, Issue 3, Feb. 2003, pp. 922-927.

S. V. Cherepko amd J. C. M. Hwang,
“Implementation of NQS effects in large-signal BJT models”
IEEE MTT-S International Microwave Symposium Digest, Vol. 2, 2003, pp. 647-650.

S. Vainshtein, V. Yuferev, and J. Kostamovaara,
“Nondestructive Current Localization Upon High-Current Nanosecond Switching of an Avalanche Transistor”
IEEE Trans. Electron Devices, Vol. 50, Issue 9, Sept. 2003, pp. 1988&1990.

Y. Shi, G. F. Niu, J. D. Cressler and et al.,
“On the consistent modeling of band-gap narrowing for accurate device-level simulation of scaled SiGe HBTs”
IEEE Trans. Electron Devices, Vol. 50, Issue 5, May 2003, pp. 1370-1377.

K. P. Roenker et al.,
“Effects of Collector Heterojunction Displacement from its P-N Junction on the Unilateral Power Gain at 10 and 26 GHz in SiGe HBTs”
ICSI3 SiGe Conference, Santa Fe, New Mexico, March 2003.

N. D. Jankovic et al.,
“Performance Evaluation of SiGe HBTs on Virtual Substrates”
ICSI3 SiGe Conference, Santa Fe, New Mexico, March 2003.

W. B. Chen, Y. K. Su, L. C. Lin and et al.,
“Oxide confined collector-up heterojunction bipolar transistors”
Jpn. J. Appl. Phys. 1, Vol. 42, May 2003, pp. 2612-2614.

M. Murtagh, P. V. Kelly, B. O’Looney, F. Murphy, M. Modreanu,
“Heterojunction bipolar transistor characterisation using non-contact optical spectroscopy”
Proceedings of SPIE&The International Society for Optical Engineering, Vol. 4876, Issue 2, 2002.

M. Falah, D. Linton and J. Williamson,
“Design of schottky diode using Silvaco”
7th IEEE High Frequency Postgraduate Student Colloquium, 2002, pp. 30 -36.

E. V. Monakhov, J. Wong-Leung, A. Yu. Kuznetsov, C. Jagadish, and B. G. Svensson,
“Ion mass effect on vacancy-related deep levels in Si induced by ion implantation”
Phys. Rev. B, Vol 65, Issue 24, 245201 (2002).

T. H. Prettyman, K. D. Ianakiev, S. A. Soldner and Cs. Szeles,
“Effect of differential bias on the transport of electrons in coplanar grid CdZnTe detectors”
Nuclear Instruments and Methods in Physics Research Section A, Vol. 476, January 2002, pp. 658-664.

S. Y. Cheng,
“Comprehensive study of an InGaP/AlGaAs/GaAs heterojunction bipolar transistor with a continuous conduction-band structure”
Semiconductor Science and Technology, Vol. 17, Jul. 2002, pp. 701-707.

S. Y. Cheng,
“Theoretical investigation of an InGaP/GaAs heterostructure-emitter bipolar transistor with a wide-gap collector”
Semiconductor Science and Technology, Vol. 17, May 2002, pp. 405-413.

S Michael, P Michalopoulos,
“Application of the SILVACO /ATLAS software package in modeling and optimization of state-of-the-art photovoltaic devices”
MWSCAS-2002 Vol.: 2 , Aug. 4-7, 2002 pp. 651 -654.

S. Y. Lee, H. S. Kim, S. H. Lee and et al.,
“The behavior of Ti silicidation on Si/SiGe/Si base and its effect on base resistance and f(max) in SiGe hetero-junction bipolar transistors”
Journal of Materials Science&Materials in Electronics, Vol. 12, 2001, pp. 467-472.

M. Linder, F. Ingvarson, K. O. Jeppson, S. L. Zhang, J. V. Grahn, M. Ostling,
“A new test structure for parasitic resistance extraction in bipolar transistors”
IEEE International Conference on Microelectronic Test Structures, 2001, pp. 25-30.

M. Sanden, S. L. Zhang, J. V. Grahn and et al.,
“A new test structure for extracting extrinsic parameters in double-polysilicon bipolar transistors”
IEEE Trans. Electron Devices, Vol. 47, Issue 9, Sep 2000, pp. 1767&1769.

A. McDonald, R. Mahaffy, X. -D. Wang, C. Kuklewicz, C. K. Shih, M. Dennis, D. Tiffin, D. Kadoch, M. Duane,
“Quantitative two-dimensional profiling of 0.35 μm transistors with lightly doped drain structures”
Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures, Vol. 18, Issue 1, January 2000, pp. 572-575.

Deignan A. McAuliffe D. Doyle D. Moloney K. Roche M.O’Neill M.,
“Dose Loss and Deffect Mechanismes in Antimony Buried Layers for a 0.35um BiCMOS Process”
Proc. ESSDERC 2000, pp. 273-275.

M Linder, B G Malm, P Ma, J V Grahn, S-L Zhang, M Östling,
“The Effect of Emitter Overetch and Base Implantation Tilt on the Performance of Double Polysilicon Bipolar Transistors”
Physica Scripta T, Vol. 79, 1999, pp. 246-249.

S. C. Witczak, R. D. Schrimpf, H. J. Barnaby and et al.,
“Moderated degradation enhancement of lateral pnp transistors due to measurement bias”
IEEE Trans. Nuclear Science, Vol. 45, Issue 6, Dec. 1998, pp. 2644-2648.

S. A. Lombardo, V. Privitera, A. Pinto and et al.,
“Band-gap narrowing and high-frequency characteristics of Si/Ge_xSi_1-x heterojunction bipolar transistors formed by Ge ion implantation in Si”
IEEE Trans. Electron Devices, Vol. 45, Jul. 1998, pp. 1531-1537.

Zampardi, Peter Joseph PhD,
“A study of new base pushout effect in modern bipolar transistors”
Univ of California, LA, 1997, 165 pp., AAT 9807643.

L. Vendrame,
“Optimisation of a link base implant for reducing the access base resistance of single-poly quasi self-aligned bipolar transistors”
ESSDERC 1996, pp. 803-806.

Peter J. Hopper and Peter A. Blakey,
“MASTER Framework”
Microelectronics Journal, Vol. 26, No. 2-3, 1995, pp. 177-190.

Y. Apanovich, P. Blakey, R. Cottle, E. Lyumkis, B. Polsky, A. Shur, A. Tcherniaev,
“Numerical simulation of submicrometer devices including coupled nonlocal transport and nonisothermal effects”
IEEE Transactions on Electron Devices, Vol. 42, Issue 5, 8 May 1995, pp. 890-898.

Y. Apanovich, E. Lyumkis, B. Polsky, A. Shur, P. Blakey,
“Steady- State and Transient Analysis of Submicron Devices Using Energy Balance and Simplified Hydrodynamic Models”
IEEE Trans. on CAD, Vol. 13, Issue 6, 6 June 1994, pp. 702-711.

Y. Apanovich, E. Lyumkis, B. Polsky, A. Shur, P. Blakey,
“Steady-State and Transient Analysis of Submicron Devices Using Energy Balance”
Trans. CADICS, 1994.

Kosier, DeLaus, Wei, Schrimpf, Martinez,
“Simple Technique for Improving the Hot-Carrier Reliability of Single-Poly Bipolar Transistors”
IEEE, BIp/BICMOS Circs & Tech Mtg, Oct 1994, pp. 205-208.

Rainer Constapel, Jacek Korec, and B. J. Baliga,
“Device Simulation of a Trench-IGBT with Integrated Diverter Structures”
This article is based on the original paper “Trench-IGBTs with Integrated Diverter Structures” published by in Proceedings of ISPSD 95, Yokohama.

Z. R. Tang, T. Kamins and C. A. T. Salama,
“Current gain-early voltage product in SiGe base HBTs with thin a-Si:H emitters”
Proc. ESSDERC 1994, pp. 473-476.

R. J. Graves et al.,
“Visualisation of ionising-radiation and hot-carrier stress response of polysilicon emitter BJTs”
Proc. IEDM Tech. Dig., 1994, pp. 233&236.

Shur, Lauderback, Polsky, Tcherniaev, Blakey,
“THUNDER A 3D Device Simulator for Industrial Applications”
NASECODE, 1993.

A. Tchernaiev, R. Cottle, B. Freydin, E. Lyumkis, B. Polsky and P. Blakey,
“Efficient, versatile and robust mixed circuit-device simulation”
in Proceedings of NASECODE IX, pp. 107-109, 1993.

Y. Apanovich, B. Cottle, B. Freydin, E. Lyumkis, B. Polsky, P. Blakey,
“Numerical simulation of electrothermal effects in semiconductor devices”
in Proceedings of the SISDEP, pp.289-292, 1993.

Frederickson A .R., Rabkin P.,
“Simple Model for Carrier Densities in the Depletion Region of p-n Junctions”
Electron Devices, IEEE Transactions on Vol. 40, Issue 5, May 1993 pp. 994&1000.

Apanovich, Lyumkis, Polsky, Blakey,
“An Investigation of Coupled & Decoupled Iterative Algorithms for Energy Balance Calculations”
SISDEP, 1993.

S. L. Kosier et al.,
“Charge Separation for Bipolar Transistors”
IEEE Trans on Nuclear Science Dec 1993, Vol. 40, Issue 6, pp. 1276-7285.

Wu, Fand-Man, PhD,
“Structure analysis and modeling for a merged Bipmos device (subcircuits)”
North Dakota State Univ of Agriculture and Applied Science, 1992, 157 pp., AAT 9238089

Apanovich, Lyumkis, Polsky, Shur, Blakey,
“Numerical Simulation of Sub-micron Devices Using Energy Balance & Hydrodynamic Models in the General-Purpose Device Simulator SPISCES-2B”
Workshop on Comp Electronics, 1992.

Cole, Buturia, Furkay, Varahramyan, Slinkman, Mandelman, Foty, Bula, Strong, Park, Linton, Johnson, Fischetti, Laux, Cottrell, Lustig, Pileggi, Katcoff,
“The Use of Simulation in Semiconductor Technology Development”
Solid-State Electronics, Vol. 33, Issue 6, June 1990, pp. 591-623.

Lombardi, Manzini, Saporito, Vanzi,
“A Physically Based Mobility Model of Nonplanar Devices”
IEEE Transactions on CAD of Integrated Circuits and Systems, Vol. 7, Issue 11, November 1988, pp. 1164-1171.