Thermal Optimization on GaN HFET Using Flip Chip and Through Wafer via Structures

Introduction

GaN heterojunction field effect transistors (HFETs) have been under extensive investigation because of their projected superb performances as high-power RF devices. The inherently high breakdown field arising from the wide bandgap guarantees not only the high power input/output characteristics but also extreme device shrinkage which is a huge advantage for increasing the highest operation frequency. Two-dimensional electron gas (2-DEG) with the charge density ten times higher than that of GaAs-based HFET and the mobility well exceeding Si enables a very low on-state resistance indispensable to RF devices. Although the superiority of the device characteristics has been demonstrated, the self heating effect has hindered the production of high power and high speed GaN-based switching devices. This effect can be significantly reduced by the cost effective heat-sink approach (Flip chip or through wafer via)[1,2].

In this paper, in order to understand and control the self heating effect, GaN HFET with flip chip and through wafer via (TWV) structures were simulated, and device characteristics were compared using the ATLAS 2D device simulator.