Calculating Failures In Time Rates for FinFET Circuits Using TCAD
In a previous article in Simulation Standard article entitled “Soft Error Simulations”, we discussed various ways to simulate soft errors using either TCAD, SPICE or a mixture of both. In this article we present a methodology for obtaining the Weibull function curve required for calculating the Failures In Time (FIT) rate of typical circuits in a reasonable time, using only TCAD simuations. This approach allows a true calculation of FIT rate by simulating incoming ionizing particles for any angle, location, and energy, in relation to devices in the circuit.
By way of example, we shall use a ring oscillator circuit fabricated using a 7nm FinFET technology, but essentially any technology or circuit can be simulated using the techniques described here.