Continous Trap Model for Accurate Device Simulation of Polysilicon TFTs

System on a Panel Requirements

There has been a significant increase in the popularity of liquid crystal displays with control circuitry being placed on to the glass (system on a panel). This has been made possible by the technological improvements of thin-film-transistors (TFTs) manufactured on glass substrates. The sudden popularity is a result of the move away from the traditional use of amorphous silicon towards polycrystalline silicon. The increase in performance by this switch has allowed these TFTs to be applied to applications beyond pixel control transistors.

In order to design circuits using TFTs it is fundamentally necessary to understand the physics involved in their operation. The best way of achieving this is through two-dimensional device simulation. Polysilicon consists of a number of grain and grain boundary regions. Improvements in processing have resulted in quite large, ~0.5um, well controlled grain regions. Within the grain boundaries there exists trapped charge which act as potential barriers. The effect of the trapped charge can then be modeled by defining the average band bending which is determined by the spatially averaged trapped charge density. By this means it is possible to calculate a CONTINUOUS, volume averaged, density of states (DOS) profile across the band gap. This DOS profile is modeled using profiles of acceptor-like and donor-like traps distributed across the bandgap.