SPICE Modeling for Flexible Electronics

Memory Statistical Characterization Solution with VarMan

Standard Cell Statistical Characterization with VarMan

Statistical Analysis Flow for Analog Design with VarMan

Solar cell modeling using TCAD and SPICE

High Voltage Power Device Modeling with HiSIM_HV 2

TCAD to SPICE simulation of SiC and Si Power Devices

Validation of CLEVER Interconnect Parasitics with 0.18 µm Process Measurements Benoit Froment and Herve Jaouen – SGS-Thomson Microelectronics

CLEVER can perform accurate field solver extractions of resistance and capacitance from 3D structures generated from realistic process simulation. Comparison of CLEVER results with measurements made by SGS-Thomson Microelectronics were done to validate the simulator.