• Webinars

SPICE Modeling for Flexible Electronics

Flexible electronics has an exciting potential for enabling bendable, rollable and foldable displays, smart product labeling as well as various applications in wearable, healthcare and medical electronics. The circuit design with the emerging flexible thin-film and ultra-thin chip process technologies requires to account also for mechanical strain effects on device characteristics in circuit simulation. The main goal of this webinar is to present principles and practical techniques to extend and customize the TFT and MOSFET SPICE models to account for mechanical strain effects in flexible electronics circuit design and physical verification.

What attendees will learn:

  • Emerging ultra-thin chip, thin-film and hybrid flexible electronics design challenges
  • The physical modeling of mechanical strain effects on semiconductor electronic properties and device characteristics
  • The methodology and practical techniques for:
    • instantiation of arbitrary applied mechanical strain conditions in SPICE netlists
    • extension of TFT SPICE models to account for mechanical strain effects
    • utilization of Open Model Interface (OMI) in customization of standard SPICE models for ultra-thin chip flexible electronics applications


Dr. Slobodan MijalkovicDr. Slobodan Mijalkovic is a Senior R&D Engineer at Silvaco Simulation Department specialized in all aspects of compact model development and implementation in EDA tools. Before joining Silvaco, he was a Principal Researcher at Delft University of Technology in the Netherlands, where he has led a team for standardization of the Mextram bipolar transistor model with Compact Model Coalition (CMC). Formerly, he was Assistant and Associate Professor at the Faculty of Electronics Engineering, University of Nis in Yugoslavia.

Dr. Mijalkovic has authored about 50 cited publications and a monograph “Multigrid Methods for Process Simulation” in the Springer “Computational Microelectronics” series. He is a senior member of IEEE and currently a member of IEEE EDS Compact Modeling Committee.

When: December 6, 2018
Where: Online
Time: 10:00am-11:00am – (PST)
Language: English


Academics, engineers and management looking for solutions to circuit design and physical verification in ultra-thin chip, thin-film and hybrid flexible electronics.