New Features in the 2023 Baseline Release:
May 24, 2023
May 18, 2023
In this webinar, we present geometric etch models in the context of FinFET and memory applications. We demonstrate techniques to realize fin shaping, non-ideal etch profiles (bowing, twisting), and self-aligned processes (multi-patterning).
The past several years has seen a fast deployment of wide-bandgap power devices in fast chargers, electric vehicles, data centers and renewable energy processing. The performance of power devices is fast progressing towards their intrinsic material limit. As these devices can handle higher voltage and larger current density, packaging and thermal management will become the key limiting factor for exploiting their benefits in power electronic converters and systems.
It is common to run the process simulation for the part of a larger structure just to reduce the computation time. To account for the influence of parts of the structure outside the simulation domain, Victory Process makes assumptions about overall structure geometry.
March 23, 2023
In this webinar, we will present the benefits of adopting SmartSpice’s unique 4-terminal TFT compact model, and we describe how SmartSpice Flex Modeling technology can be used to simulate image retention issues.
The utilization of thin material layers is common in modern semiconductor device fabrication. Subsequent etching steps require an accurate modeling of these thin layers. Although level-set based process TCAD simulations are capable of representing flat thin material layers with sub-grid accuracy, topographical changes during etching processes expose the low underlying grid resolution, which leads to detrimental artifacts.
February 23, 2023
In this webinar, Sungwon Kong will discuss these technologies and how TCAD can be broadly applied to multiple detector topology and material sets, thereby enabling multiple end-user markets.