Entries by Gigi Boss

Simulation of the High Temperature Performance of InGaN ‘Topping’ Cells

This work reports on the design of a high efficiency InGaN-based two junction (2J) tandem solar cell via numerical simulation, operating at high temperatures (450o C) and under 200 suns for application in a hybrid concentrating solar thermal (CST) system. To address the polarization and band-offset issues for GaN/InGaN heterojunction solar cells, band engineering techniques are employed. A simple interlayer is proposed at the hetero-interface rather than using an In composition grading layer, which is difficult to fabricate. The base absorber thickness and doping concentration have been optimized for 1J cell performance, and current matching was imposed on the series constrained 2J tandem cell design. The simulation results show that the crystalline quality (short recombination lifetime) of current nitride materials is a critical limiting factor the performance of the 2J cell design at high temperatures. The theoretical conversion efficiency of the best devices can be as high as ~21.8% at 450o C and 200X based on the assumed material parameters.

Learn How Silvaco Flow Helps Designing and Simulating Pixel Arrays in Flat Panel Displays and Detectors

June 30, 2022
In this webinar, we highlight how leading display and detector companies exploit the capabilities of Silvaco tools for schematic and layout editing, very accurate field solver-based parasitic extraction required by modern TFT technology, back-annotation of parasitic RC elements into the netlist, and fast and accurate SPICE simulations of large arrays of pixels.

Investigation of Self-Heating Effects in SOI MOSFETs with Silvaco Numerical Simulation

Self-heating effect may cause over-heated damage and degradation for silicon-on-insulator (SOI) devices, so numerical counting heat generated, and distribution can optimize the radio frequency integrated circuits (RFICs) applications. Both conventional and high resistivity, trap-rich SOI substrates are fabricated to investigate self-heating effects. There are two identical n channel metal-oxide-semiconductor-field-effect transistors (nMOSFETs) placed together to share a common source and the same active silicon region. One MOSFET is biased above threshold voltage and into saturation to heat-up the active region as a heater, and another device is biased into the sub-threshold regime to track the temperature changes as a localized thermometer. Compared to bulk single crystal silicon, the trap-rich SOI substrate consists of a high-defected polysilicon layer, which has introduced between the buried oxide layer and substrate. Due to the grain boundaries, the polysilicon layer has more phonon scattering and less value of thermal conductivity. However, based on the measurement results, two types of substrates SOI devices have similar performance for temperature increased. Therefore, a Silvaco numerical simulation has been issued to analysis the heat flow distribution within the devices and dissipation solution.