Learn About Advanced TFT-Based Flat Panel Design with SmartSpice

In this webinar, we will present the benefits of adopting SmartSpice’s unique 4-terminal TFT compact model, and we will also describe how SmartSpice Flex Modeling technology can be used to simulate image retention issues.

Many TFT technologies in the market today are based on 4-terminal devices, while SPICE simulators from other vendors can only support 3-terminal TFT compact models. Silvaco’s 4-terminal TFT model is unique in the market. We will present the key characteristics of this compact model and some of the degrees of freedom that it brings to both modeling and the design teams.

Image retention is a long-standing issue in the display community. To effectively solve this issue, or even to minimize its impact on their products, display manufacturers and consumer electronics vendors need to simulate this effect at the SPICE level. We describe how SmartSpice Flex Modeling technology can be used to simulate image retention issues and model any dynamic device effects in SPICE simulation.

What You Will Learn

• The importance of adopting a 4-terminal TFT model
• A quick review of image retention problems
• A deeper understanding of their root causes
• How to use SmartSpice Flex Modeling to simulate image retention
• How to improve the quality of your display (or the display of your product)

Presenter

Jody Matos, Director of Circuit Simulation, Silvaco, Inc.

Dr. Jody Matos is a Ph.D. Computer Scientist who is passionate about research and development of software and hardware designs. Currently, he is the Director of Circuit Simulation at Silvaco, where he has been managing leading-edge R&D and business-related projects for EDA tools. His current tasks are mainly related to circuit simulation and analyses on analog, digital, and mixed-signal IC designs.

Dr. Matos received a Ph.D. degree in computer science from the Federal University of Rio Grande do Sul (UFRGS), Brazil, and a M.S. degree in microelectronics from the same institution. He has co-authored 30+ research papers and patent applications that mix knowledge of both computer science and microelectronics. Dr. Matos has also served as an expert reviewer and on technical committees of several renowned journals and international conferences in the fields of design automation.

WHO SHOULD ATTEND:

Display designers, analog circuit designers, CAD and SoC design engineers, product managers, and engineering management in the circuit simulation field.