June 24, 2021 | 10:00 am – 10:30 am (PDT)
In this webinar you will learn how Silvaco Foundation IP helps you achieve your low power designs Memory compiler features and flexibility Standard Cell library features and implementation.
May 12, 2021 | 13:00-13:40 (JST)
In this webinar, we will introduce CAAC-IGZOⓇ FET (c-axis aligned crystalline indium-gallium-zinc oxide FET) developed by Semiconductor Energy Laboratory Co., Ltd. (SEL) and the CAAC-IGZO FET SPICE model jointly developed by SEL and Silvaco.
Unlike conventional ohmic contact thin-film transistors (TFTs), contact-controlled TFTs [1], [2] rely on source energy barriers to produce a range of benefits including: low saturation voltages; extremely high intrinsic gain; power-efficiency; electrical stability; and uniformity of operation, notably with imprecise processes [3]. Generally, these benefits come at the expense of transconductance, however in materials such as polysilicon, similar levels of on-current can be obtained in a more compact footprint without any trace of kink-effect [4], [5].
June 3, 2021 | 10:00 am – 10:30 am (PDT)
In this webinar, you will learn development & delivery of complete IO & ESD library in 5 weeks.
May 20, 2021 | 10:00 am – 10:30 am (PDT)
In this webinar, a workflow that combines process and device TCAD to support the design of GaN-based LEDs is presented.
Location: United States
Silvaco is looking for interns to join the TCAD Group. As part of this internship, the interns will work to update and expand Silvaco’s TCAD example set and update product documentation. The intern will gain skills and become more proficient in Semiconductor Device Modeling as well as technical writing and technical presentation. Furthermore, interns will have an opportunity to pursue some independent research work utilizing Silvaco tools that could align with graduate research studies. We are looking for a curious, open-minded spirit.
May 13, 2021 | 10:00 am – 10:35 am (PDT)
In this webinar we will look at some of the effects to check when designing a flat panel.
In this article, the operation of avalanche photo-diodes in the medium gain, continuous operation mode is investigated. In other words, we are not considering diode operation in transient “Gieger” or “single photon” detection mode, but rather in a region safely below secondary breakdown, where a well-designed avalanche photo diode can exhibit a moderate photo-generated current multiplication factor of an order of magnitude or higher.