Learn How Silvaco Flow Helps Designing and Simulating Pixel Arrays in Flat Panel Displays and Detectors
Designers of flat panel displays and detectors often rely on a variety of point tools from different EDA vendors that make the design flow discontinuous and difficult to integrate. These challenges, together with specific advanced display technology requirements, are addressed by the seamless and unique Silvaco TCAD-EDA flow.
This webinar highlights how leading display and detector companies exploit the capabilities of Silvaco tools for schematic and layout editing, very accurate field solver-based parasitic extraction required by modern TFT technology, back-annotation of parasitic RC elements into the netlist, and fast and accurate SPICE simulations of large arrays of pixels.
What You Will Learn
- Challenges of FPD and detector design
- Designing and simulating pixel arrays by adopting Silvaco’s seamless TCAD to EDA design flow
- Field solver-based parasitics extraction