日志 Erick Castellon

New Parasitic Capacitance Modeling in Hipex-C

3月 1, 2005在： /通过：

In deep submicron technology, conduction layers have widths much smaller than their thicknesses (see Figure 1). This makes edge parasitic capacitance effects more dominant than plate capacitance.

In a multi-body system, neighboring conductors may capture some or all of the electrical fields lines emanating from a particular conductor. These field lines would otherwise terminate else where. This phenomenon is called charge sharing, which plays an important role in modeling parasitic capacitances.

Capacitance Coupling Calculation of IPS mode TFT-LCD Using Clever

3月 1, 2005在： /通过：

The increasing demand of the TFT-LCD industry has lead to a rapid growth in display size and resolution. The higher cell packing density results in a narrowing viewing angle and image degradation due to electrical coupling between the data bus lines and display electrodes. This “crosstalk” therefore becomes a serious limitation. The in-plane switching(IPS) mode has been used as an excellent technology solution for realizing extremely wide viewing angles.

Simulating Selective and Non-Selective Epitaxy Over Oxide Isolated Regions Using Athena

2月 1, 2005在： /通过：

In certain cases, most notably in modern bipolar and SiGe HBT structures, epitaxial steps are performed after the oxide isolation structures have been already created. Thus the initial surface prior to epitaxy may contain regions of crystalline silicon, polysilicon or insulators, usually silicon dioxide. In the case of LOCOS isolation, the surface is also non-planar.

Process and Device Simulation of Field Emission Microtrides

2月 1, 2005在： /通过：

One of the most beneficial merits of computer-based experiment using TCAD lies in its capability of a total simulation of the target device. One can consider its novel fabrication process and its device performance at the same time without time consuming and expensive experiments using real wafers. Take field emission microtriodes, for example.

Pending Issues in the Modeling of Concentrator Solar Cells

2月 1, 2005在： /通过：

The modelling of concentrator solar cells for real conditions of operation inside optical concentrators is a subject almost untreated. Consequently, this work highlights the main specific situations that should be included in a realistic modelling. The results of a 2-D modelling applied to the case of a 1000 sun GaAs concentrator solar cell inside a TIR-R concentrator are presented. The necessity of going towards a 3-D modelling is also stated. This task is being carried out now at IES-UPM. Keywords: concentrator cells, modelling, III-V semiconductors.

How can I view a Foundry DRC run in Expert?

12月 1, 2004在： /通过：

Q: How can I view a Foundry DRC run in Expert?

A: Before a Foundry will start creating the masks to fabricate a design, they normally will do some sort of drc verification with legacy tools. For the Analog Designer, it is always important to beable to understand the feedback from the Foundry. Silvaco makes that easier than ever since Expert can import two other commonly used error database formats: Calibre and DRACULA. Just request the error databases from the foundry, and you can save countelss hours locating the errors that you didn’t know you made!

Cross-Sectional Viewer

12月 1, 2004在： /通过：

Cross-Sectional Viewer is a tool in the Expert layout editor that simulates the cross-sections of ICs along an arbitrary drawn cut-line on the layout. Cross-Sectional Viewer is a link between the layout and the resulting device and it helps the designer to understand its spatial structure. Cross-sectional drawings are useful for detecting parasitic coupling, undesired metal stacking, and other design and fabrication problems.

How do you perform a lift off procedure in ATHENA?

11月 1, 2004在： /通过：

A common technique for creating metal contacts is one known as a lift off. When performing a lift off process step, in order to create metal contacts, for example, it is imperative that the part of the metal to be lifted off is disjoint from the deposited metal layer. A good way of performing a lift off process procedure in ATHENA is to make use of a deposit machine created in ATHENA.