• Interface PHYs

Silvaco提供三星Foundry工艺上经量产验证的高速接口IP解决方案。

协议功能特性
三星Foundry
28nm
FD-SOI
14 nm
11 nm
10 nm
8 nm
7 nm
5 nm*
PCIePCIe Gen 3, 8 Gbps
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PCIe Gen 3/4, 16 Gbps
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DDRDDR3/4, 3.2 Gbps, 32/64-bitPDF
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LPDDR3/4, 4.3 Gbps, 16/32-bitPDF
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DDR/LPDDR3 Combo, 1.6 Gbps, 32-bit
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LPDDR4/4X, 4.3 Gbps, 16/32-bit
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LPDDR4/4X/5, 5.5 Gbps, 16-bit
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LPDDR4/4X/5, 6.4 Gbps, 16-bit
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HBM2e, 3.2 Gbps

MIPIM-PHY G3, 6.0 Gbps (UFS only)
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M-PHY G4, 12.0 Gbps (UFS only)
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D-PHY V1.2, 2.1 Gbps
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C-PHY D-PHY Combo V1.1 (2.5 Gbps) / V1.2 (2.5 Gbps)
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C-PHY D-PHY Combo V1.1 (2.5 Gbps) / V2.0 (4.5 Gbps)
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SerDesSerDes 56 Gbps, 10/50G-KR, 100G-KR2/4, 200G-KR4
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HDMIHDMI 2.0 Tx, 6.0 Gbps
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USB / DisplayPort ComboUSB 3.1 Gen 1 / DP Tx Combo, 5 Gbps / 5.4 Gbps
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V-by-OneTx, 4 Gbps, 16 lanes
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Rx, 4 Gbps, 8 lanes
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Contact Silvaco if you need additional info on a specific IP or you do not see the IP product you require.

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客户

Srinath Anantharaman
 The integrated solution enables design teams to collaborate efficiently in a secure design environment when developing their IPs or SoCs either locally or across multiple design sites. It enables design teams to successfully tapeout their designs by mitigating the risk by sharing and using the correct version of the design data and IPs. 
Rick Lazansky
 Over the past two years, Silicon Catalyst has been working with key industry players to develop a complete ecosystem that economically and effectively supports the new wave of semiconductor startups that we are seeing today. Our Portfolio Companies have consistently been requesting IP as the critical element that we had not been able to deliver. Silvaco’s offering fulfills a real hole that has been impeding the success of these startups. We are glad to deliver this capability as we continue to build the semiconductor start up ecosystem.