What’s in the New MIPI Alliance I3C V1.1 Standard?

February 27th 2020 | 10:00 am - 11:00 am (PST) I3C has the advantages in reducing pin count, increasing performance, and decreasing power while achieving some level of backwards compatibility with the long established I2C interface. The new I3C V1.1 announced in January 2020, enables faster interface speeds up to 100 Mhz and has many other new features that will aid the transition from I2C to I3C in applications.

New MIPI I3C V1.1 Standard Streamlines Peripheral Connectivity with Lower Cost and Higher Bandwidth

The MIPI Alliance (MIPI) develops interface specifications for mobile and mobile-influenced industries. There is at least one MIPI specification in every smartphone manufactured today.

安全IP

IP Solutions for Secure Autonomous Driving

Free 350 pg. Book on SoC Design and Secure Autonomous Driving Webinar

Silvaco has an upcoming webinar IP Solutions for Secure Autonomous Driving on Dec. 3, 10am – 11am (PST) .The webinar will present the risks and necessary countermeasures for securing cyber-physical vehicle systems.

Everything You Want to Know about Silvaco Foundation IP

In the creation of an ASIC or SoC a wide variety of digital components are needed. Standard logic cells are used to implement the high-level description of the chip which is typically written in RTL. A synthesis tool such as Design Compiler or RTL Compiler is used to generate a gate-level netlist built out of the standard logic cells from a cell library. Communication on and off of the chip, requires unique input/output cells or I/Os that can drive off-chip wiring and withstand electrostatic discharges in the range of thousands of volts. The other main category is digital memories typically SRAMS that can take up a significant amount of area on the die for a chip. These 3 categories of digital design IP are called Foundation IP.

System and Method for IP Fingerprinting and IP DNA Analysis

In the world of SoC development, an IP management system is software for the licensing, distribution and compliance administration of design IP for both vendors and consumers of IP.In May 2019 Silvaco was awarded a patent for System and Method for IP fingerprinting and IP DNA analysis. This patent reflects the unique technology inside the Xena® IP Management System from Silvaco.

Silvaco SIPware Automotive IP

I/O Design and Characterization – How Can You Compete with Free?

I interviewed Silvaco partner Stephen Fairbanks, CTO of Certus Semiconductor from the show floor at DAC 2019, in Las Vegas, about I/O Design and Characterization. He talks about using the Viola characterization tool from Silvaco for a complex part while under time pressure to produce an accurate model. A full ranscript of the conversation is below.