• Simulation Standard Technical Journal

Simulation Standard

Technical Journal

A Journal for Process and Device Engineers

Is there a way to turn-off all of the generated layers

Is there a way to turn-off all of the generated layers so that the layout modifications can be done without them cluttering things?

Expert’s Netlist Driven Layout

Expert features a powerful Netlist Driven Layout (NDL) function to assist the user in creating a layout. It increases the productivity of layout design by automating cell generation and providing visual cues to assist in the wiring process. In this example, a latch circuit layout will be built based on developed child cells.

Expert Parametric Wires

Expert Parametric Wire (Pwire) is a complex group of objects containing, a single wire named master wire, any number of subparts such as enclosure wires, offset wires and sets of rectangles. Pwire objects enable extremely quick and efficient creation and editing of guard rings and shielded paths which are increasingly important due to higher integration density of IC designs.

I am currently using ATLAS/ Blaze to model the electrical properties of an LED device

I am currently using ATLAS/ Blaze to model the electrical properties of an LED device that I am investigating. Is it possible to examine the reverse ray trace from my simulated structure so that I can examine the angular distribution properties of the optical output of the device?

Simulating the Device Characteristics of MEH-PPV Polymer Light Emitting Diodes Using Atlas

Organic light emitting diodes (OLEDs) are attracting great interest in the display technology industry due to their promising low cost large area manufacturing and relative ease of fabrication using low processing temperatures. Although the research work of OLEDs has began since early 1980 and has been well established, there is still no commercially available software that can simulate the electrical and optical behavior of these organic polymer/monomer based devices. As such, Silvaco-ATLAS has recently extended its capability to simulate these devices using a variety of appropriate organic polymer/monomer models.

A Comprehensive Solution for Simulating Ultra-Shallow Junctions: From High Dose/Low Energy Implant to Diffusion Annealing

The persistent semiconductor technology trend of shrinking down device size requires development of veryaggressive technological setups consisting in high dose/low energy implants, followed by rapid thermal anneals (RTA).