• Simulation Standard Technical Journal

Simulation Standard

Technical Journal

A Journal for Process and Device Engineers

3D Simulation of Dual-Gate Thin Film Transistors

Dual-Gate Thin Film Transistors (DGTFTs) are often used in pixel driver and peripheral circuits for liquid crystal displays. This is because of the reduction of the gate-off state leakage current as well as the kink effect [1,2]. Recently it has been also necessary to consider the problems caused by 3D effects such as the IV characteristics hump effect [3] and leakage current at the edge of the active region [4,5]. This requires 3D simulation of DGTFT characteristics in a reasonable time. However, simulation of DGTFTs is generally difficult, particularly in 3D, because of the electrical floating region between the dual TFTs. This region can cause difficult convergence when calculating the gate-off state characteristics including the Gate-Induced Drain Leakage (GIDL) current. In this article, we demonstrate that our 3D TCAD simulation framework, Victory, can simulate a normal DGTFT and an L-shape DGTFT [2] in 3D accurately, robustly and in a reasonable simulation time.

Effect of Fin Thickness on Subthreshold Characteristics of 10 nm FinFETs Using 3D TCAD

The planar bulk Si metal-oxide semiconductor field-effect transistor (MOSFET) has reached its scaling limit due to various short channel effects (SCE). With 20 nm advanced planar technology, the source and drain encroached into channel resulting in off state leakage current. Tri gate FinFET devices have already replaced conventional planar MOSFETs for 14nm and beyond due to their superior control over the channel resulting in lower values of subthreshold swing (SS) and reduced drain induced barrier lowering (DIBL). Nevertheless, gate induced drain leakage is found to be the limiting factor in achieving ultralow (<100pA/um) values of IOFF. In this work, we have studied the effect of fin thickness on subthreshold characteristics of bulk nFinFET using three dimensional simulation.

Simulation of a Bipolar Junction Transistor Under High and Low Current Injection Conditions

Semiconductor devices such as bipolar power transistors and solar cells may operate over a range of optical or electrical injection levels. In some cases of high injection, this may result in the occurrence of an electron-hole plasma somewhere in the device. For reliable device simulations, TCAD models need to cover the range of operating conditions and have models which depend on carrier densities, electric field, dopant densities, trap densities, and temperature. For the carrier mobilities, a Silvaco Device Simulator has several models that work well for high doping levels and high free carrier densities. For Shockley-Read-Hall carrier recombination, a Silvaco Device Simulator has a range of options for trying to include the dependence of the recombination lifetimes on dopant densities, and one model to include the dependence on carrier density [1]. At very high carrier concentrations, however, the dominant carrier recombination mechanism is Auger recombination.

Thermo-mechanical Stress in Through-Silicon-Vias

During the last several years, the enhancement of integrated circuits (ICs) performance and power consumption have contributed to the continual scaling down the size of transistors. However, scaling down semiconductor devices has brought serious challenges to the materials and processes of on-chip interconnects beyond the 32-nm technology node. Therefore, some researchers proposed another direction to increase the device density by making ICs into three-dimensional (3D) spaces and the 3D IC stacking has attracted tremendous attention for IC integration in order to reduce wire length and footprint.

Hints, Tips and Solutions – Extract geometric information from 3D process simulation

Q: How do I extract geometric information, such as material thickness or junction depth, from the current 3D process simulation using Victory Process?

TCAD Simulation of Impact Ionization at Cryogenic Temperatures, down to 3 K

Some electronic devices operate at very low, cryogenic temperatures, sometimes as low as 4 K, which is the temperature of liquid helium. Such devices include infra-red (IR) photodetectors or single-photon Avalanche Photo-Diodes (APD) (also known as a Geiger-mode APD or GAPD), based on a reverse biased p-n junction in which a photo-generated carrier can trigger an avalanche current due to the impact ionization mechanism. This device is able to detect low-intensity optical signals, e.g. single photon [1], [2].