It is often the case that a design of experiments (DOE) is required to optimize the performance of a particular device.  Sometimes this simply means tweaking the implant dose for threshold voltage or other minor adjustments, but in other cases it can mean tweaking such things as high energy deep well implants.

Recently a new diffusion model was introduced to Victory Process: the CMOS model. This model aims at taking on the challenges brought by the specificities of CMOS device processing such as steep temperature ramps, short annealings or shallow implantations.

Properly setting the wafer orientation in Victory Process (VP) is critical for various processes such as ion implantation, etching, and deposition. For ion implantation in particular, the determination of the wafer orientation becomes crucial, given its profound impact on profile variations in channeling and non-channeling directions.