SPI vs SPI
This webinar will provide a discussion of Silvaco’s SPI, QSPI, and OSPI IP products and how they are useful in today’s SOCs. SOCs from small IoT devices to large complex multi-CPU devices use external Flash memory in their products. We will focus on the devices that require lower power and small footprint Serial Flash Memory for booting and storing important data. We will show how our QSPI with XIP (Execute in Place) features work efficiently with standard Serial Flash Memory from various manufacturers. We will also discuss our SPI to AHBLite Bridge (debug monitor) IP core and how it is useful in programming external Flash Devices.
What attendees will learn:
- Why SOCs need external Flash memory
- Why SPI?
- Flash manufacturers have standardized on an extended version of SPI
- Quad SPI and Octal SPI
- Features and uses of Silvaco’s QSPI with XIP IP Core
- Boot Loading sequence
- Flash Loading
- Software Projects
- using IAR Systems’ Embedded Workbench
- Features and use of Silvaco’s SPI to AHBLite Bridge (debug monitor)
Presenter
Jim Bruister is Director of Digital Systems in the Silvaco IP Group. Jim’s group is responsible for providing solutions for SOCs based on the AMBA architecture. This includes hardware and software as well as design and integration services.
Jim is a 38 year veteran of the semiconductor industry with extensive knowledge of microprocessor based design. Previous to Silvaco, Jim was a founder and CEO of SoC Solutions, a IP and Design Services provider based in the Greater Atlanta, Georgia (USA) Area. Jim holds a BEE degree from Georgia Institute of Technology.
When: February 8, 2018
Where: Online
Time: 10:00am-11:00am – (PST)
Language: English
WHO SHOULD ATTEND:
Engineers and management looking for solutions to design SOCs that require interfaces to Serial Flash memories.