Development & Delivery of Complete IO & ESD Library in 5 Weeks
IO, Interface circuits and ESD are basic building blocks of every chip. With the advent of newest technologies IOs/ESD have become more challenging and critical to design. But IO and ESD libraries can be designed efficiently with extreme quality. In this webinar, we discuss how to develop quality IO/ESD library quickly within 5 weeks.
What attendees will learn:
• Key challenges of IO/ESD designs at advance node SoCs and how to overcome them
Presenter
Ahmad S Mazumder is a Director of Engineering in IP Engineering Division of Silvaco. He is responsible for Development & Customer support in all Analog and Interface IPs. He is an Industry veteran on the development of High-Speed Memory & Interface IPs and all sorts of analog IPs. He worked on cutting edge DDR, extreme High-speed Serdes, Interfaces, ESD, Quality & Reliability for 24 years at various SOC companies – Intel, Broadcom, C-Cube Microsystems etc. He recently joined Silvaco’s IP Engineering Division.
Ahmad S Mazumder holds an MS in VLSI Semiconductor Design from the City University of New York and BS in Electrical & Electronics Engineering from Bangladesh University of Engineering and Technology.
WHO SHOULD ATTEND:
Engineers and management looking for solutions to design and optimize SoCs with challenging IO and ESD requirements.
When: June 3, 2021
Where: Online
Time: 10:00am-10:30am-(PDT)
Language: English