• Simulation Standard Technical Journal

Simulation Standard

Technical Journal

A Journal for Process and Device Engineers

Optimum Standard Cell Layout Using Weighted Cycle Linear Placement

Placement and routing problems for integrated circuits are inherently interrelated and extremely complex from the algorithmic point of view. This complexity grows exponentially as the scale of integration increases.

Maverick: Hierarchical Netlist Extractor for PC Platforms

Maverick is a modern hierarchical netlist extractor, providing extraordinary efficiency as well as comprehensive features and ease of use. It runs on PC under Microsoft Windows NT providing unique productivity in processing of virtually any size VLSI/ULSI designs.

HINTS AND TIPS – May 1998

How can anti-reflective coatings be modeled when simulating photodetectors in ATLAS/Luminous? How can detection efficiency be plotted?

Calibrating Reverse Short Channel Effects in MOSFETs

This article focuses on the effects of process and modeling parameters on device electrical characteristics and uses the threshold voltage versus gate length of a n-MOSFET as an illustration.

Low-Power Systems-on-a-Chip CAD

Mixed-signal systems-on-a-chip (SOC) integration of digital, analog, RF, and power components is emerging to meet demands for low-power, highly integrated systems in portable computing, wireless communications, and multimedia.

Ultra-Fast Device Simulation with Monte Carlo Tuned Transport Models in FastBlaze

FastBlaze is a fast physical device simulator for MESFETs and HEMTs optimized to provide interactive TCAD for modern III-V FET devices. It incorporates device-specific techniques to allow 1000x to 10000x simulation speeds compared to conventional device simulation.