• Simulation Standard Technical Journal

Simulation Standard

Technical Journal

A Journal for Process and Device Engineers

Simulation of the High Temperature Performance of InGaN ‘Topping’ Cells

This work reports on the design of a high efficiency InGaN-based two junction (2J) tandem solar cell via numerical simulation, operating at high temperatures (450o C) and under 200 suns for application in a hybrid concentrating solar thermal (CST) system. To address the polarization and band-offset issues for GaN/InGaN heterojunction solar cells, band engineering techniques are employed. A simple interlayer is proposed at the hetero-interface rather than using an In composition grading layer, which is difficult to fabricate. The base absorber thickness and doping concentration have been optimized for 1J cell performance, and current matching was imposed on the series constrained 2J tandem cell design. The simulation results show that the crystalline quality (short recombination lifetime) of current nitride materials is a critical limiting factor the performance of the 2J cell design at high temperatures. The theoretical conversion efficiency of the best devices can be as high as ~21.8% at 450o C and 200X based on the assumed material parameters.

Investigation of Self-Heating Effects in SOI MOSFETs with Silvaco Numerical Simulation

Self-heating effect may cause over-heated damage and degradation for silicon-on-insulator (SOI) devices, so numerical counting heat generated, and distribution can optimize the radio frequency integrated circuits (RFICs) applications. Both conventional and high resistivity, trap-rich SOI substrates are fabricated to investigate self-heating effects. There are two identical n channel metal-oxide-semiconductor-field-effect transistors (nMOSFETs) placed together to share a common source and the same active silicon region. One MOSFET is biased above threshold voltage and into saturation to heat-up the active region as a heater, and another device is biased into the sub-threshold regime to track the temperature changes as a localized thermometer. Compared to bulk single crystal silicon, the trap-rich SOI substrate consists of a high-defected polysilicon layer, which has introduced between the buried oxide layer and substrate. Due to the grain boundaries, the polysilicon layer has more phonon scattering and less value of thermal conductivity. However, based on the measurement results, two types of substrates SOI devices have similar performance for temperature increased. Therefore, a Silvaco numerical simulation has been issued to analysis the heat flow distribution within the devices and dissipation solution.

How Can I Remesh a Structure Using a Custom Volume Mesh in Victory Mesh?

Victory Mesh support for line statements lets the user customize the volume mesh used by conformal remesh schemes. The volume mesh data inherited from Victory Process can be replaced with a new volume mesh defined within Victory Mesh, allowing full control over the conformal remesh and generating a mesh suitable for device simulation in Victory Device. In this hints and tips two case studies are discussed. In the first, a solid modeling case will show how a FinFET is made using solid modeling commands, and how a volume mesh generated with line statements in Victory Mesh is used to generate a conformal remesh. A comparison of device simulations with a refined Delaunay mesh is also presented. In the second, a buffered super junction LDMOS is loaded from Victory Process and remeshed using a customized volume grid created with line statements in Victory Mesh.

Simulation of AlGaInP Multiple Quantum Well LED for Micro Display

The flat panel display industry has been growing rapidly for recent years in mobile display, car display, AR/VR applications, and large-scale TVs display. The core technology enabling these applications is the light emitting diode (LED), which is a key component to realize the highly visible, power efficient, displays. For decades, many researchers have developed blue and green LEDs using wide band gap GaN-based wurtzite crystalline material, and successfully manufactured LED devices. However, to make a bright white LED and/or an integrated RGB display, red and yellow LED is also needed. To accomplish this, a smaller bandgap material like a cubic AlGaInP material can be used.

Relating Platinum Diffusion to Minority Carrier Lifetime Control in PiN Diode: Coupled TCAD Process and Device Simulation

Platinum and gold are widely used as an effective method to control lifetime in silicon-based devices [1, 2, 3]. Platinum and gold are introduced as recombination centers to improve switching performance. Thermal diffusion is primarily used as the common method to introduce platinum or gold dopants into silicon. There is interest to better understand how the processing conditions for Pt/Au diffusion can affect switching behavior. Control and shaping of the profile is critical to obtain optimum device performance. In this article, Silvaco Victory TCAD tools [4] [5] are used to predict the effect of platinum on a PiN diode’s reverse recovery time (Trr). The simulated platinum profile from process simulation is automatically fed into the device simulator, and the relationship between platinum diffusion processing parameters and Trr is effortlessly studied.

Enabling the Rapid Development of SiC Superjunction-MOSFETs in Collaboration with mi2-factory

Introduction Super-junction based devices are a key enabling technology for power devices. Adjacent columns of p and n-type doped material with optimized doping levels enables box-like electric fields, maximizing the breakdown voltage. As the doping of the columns is comparatively high, the on-state losses can be minimized. Fabrication of such structures in SiC can be particularly challenging. Ideally the p and n-type columns will be uniformly doped. Fluctuations in doping can cause local electric field variation causing the breakdown voltage to be less than ideal. Super-junction structures can be conceived in a number of ways, but current schemes all present challenges [1] in SiC. The simplest method, as used with silicon is to use multiple implants and epitaxy steps. This is quite impractical with SiC due to the low diffusivity of dopants, requiring many sequential implantation steps. Trench etch and refill is an alternative scheme but provides its own challenges with regards to charge control and quality of the trench re-fill.