• Simulation Standard Technical Journal

Simulation Standard

Technical Journal

A Journal for Process and Device Engineers

Modification of BEM for Precise Capacitance Extraction

It is well-known that parasitic effects are no longer negligible for modern integrated circuit technology. Among the most important parasitic effects limiting the chip performance are interconnect related problems like extensive signal delays and crosstalk. The main numeric problem is extraction of parasitic capacitance, because it is a more complicated task than resistance extraction. The latest codes use directly 3D electrostatic solvers for this purpose. But the disadvantage of such approach is prohibitively long solution time for the problem. So the simplest model of 3D structures, when layout is splitted to 2D small pieces, can be used when it is necessary to handle complete IC's in a reasonable amount of time.

Advanced Layout Editing Using XI-scripts

To provide uniform etching of metal, dummy metal rectangles can be placed over an unused area of the chip. The following script generates dummy layer with a full array of metal rectangles over the whole cell area. It calls DRC script which sizes the real metal layout up by 2 µm and subtracts it from the dummy layer. Then the dummy layer sized up and down to remove any slivers left over from the subtraction phase.

Hints, Tips, and Solutions for Expert Layout Editor

Q:  How can I cut exactly the same hole in many layers? Q: How to skip a single layer during stream-out? Q: How to do filler boxes in Expert?

A Model for Boron T.E.D. in Silicon: Full Couplings of Dopant with Free and Clustered Interstitials

In this contribution we present a model for transient enhanced diffusion of boron in silicon. This model is based on the usual pair diffusion mechanism including non-equilibrium reactions between the dopant and the free point defects, taking into account their various charge states. In addition to, and fully coupled with the dopant diffusion we model the growth and dissolution of the interstitials and boron interstitials clusters associated with the anneal of the self-interstitial supersaturation created by the implantation step. It is thus possible to simulate a rather large set of experimental conditions, from conventional predeposition steps, to RTA after low energy implantation.

Breakdown Analysis of a Body-Contacted Submicron High Electron Mobility Transistor

Interest continues to grow in the development of high electron mobility transistor (HEMT) technologies for micrometer and millimeter wave power applications. A primary concern of device designers working with such technologies is the breakdown behavior in both the on- and off-states. As is the case for most field-effect transistors, reducing device dimensions results in a larger internal electric field near the drain-end of the device?s channel. The presence of such a field within the device can affect many areas of device performance including the breakdown characteristics.

QUEST: Frequency-Dependent RLCG Extractor Part 2 – Comparison with Experiments

This article presents a standard case of transmission line: the microstrip structure. First, the structure is described and then the results extracted from QUEST are compared with measurements. We thank STMicroelectronics (Crolles-R&D) for experimental data support.