Erick Castellon，作者Silvaco

2020년 11월 18일 | 3:00am-3:30am (한국 시각)
파티션 기반 시뮬레이션을 채택함으로써 SmartSpice HPP가 아날로그 회로의 과도 시뮬레이션의 모든 내부 측면을 가속화하기 위해 현대의 멀티코어 하드웨어 플랫폼을 어떻게 활용하는지 살펴 봅니다.

Optimizing a 2um, 1,500 Volt SiC Superjunction Trench-MOS Device Using TCAD

10월 1, 2020카테고리: Simulation Standard /작성자: Erick Castellon

In this paper the critical design features of a SiC superjunction trench MOS device were optimized using CAD to obtain a high breakdown voltage while minimizing any unnecessary increase in channel resistance.

TCAD Simulation of CBRAM Devices

10월 1, 2020카테고리: Simulation Standard /작성자: Erick Castellon

Conductive Bridge Random Access Memory (CBRAM) is a non-volatile memory device technology that can operate by consuming very low power. Another advantage of the CBRAM devices is its ability to be easily integrated into conventional back-end-of-line CMOS processes [1].

TCAD Mixed-Mode Simulation for GaN Power HEMTs in Unclamped Inductive Switching

10월 1, 2020카테고리: Simulation Standard /작성자: Erick Castellon

The qualification of GaN power high-electron-mobilitytransistors (HEMTs) must consider the device ruggedness against out-of-SOA (safe operating area) events [1- 3].

Using Victory Process Open Model Interface to Customize Etch Emulation Model – Example

10월 1, 2020카테고리: Simulation Standard /작성자: Erick Castellon

Dry etching is commonly used in semiconductor processing to generate deep trenches with good anisotropy. Dry etching is applied to many semiconductor technologies including Advanced FinFETs, 3D NAND, and vertical Silicon and Silicon Carbide power devices.