エントリー - Ingrid Schwarz

Very Low Energy Boron Implant Simulation Using New BCA Monte-Carlo Model

5月 1, 1999カテゴリ: /作成者:

ATHENA version 5.0 includes a new Binary Collision Algorithm (BCA) for accurate Monte-Carlo implant modeling down to sub-1keV energies. This new BCA code is a 3D model that takes account of channeling in all possible crystal directions, not just the vertical direction. Accurate modeling of all channeling directions becomes an important factor for low energy implants such as is used by the new generation of very deep submicron devices.

Hints & Tips April 1999

4月 3, 1999カテゴリ: /作成者:

A. The BSIM3_MG routine in SOI module of UTMOST III can be used to extract SOI model parameters. The SOI BSIM3_MG routine operation is similar to the one in MOS module. However the “Measurement Variables” (Figure 1) and biasing of the SOI device is unique.

SPAYN: Golden Device Search Algorithm, EKV MOSFET Model and Improved GUI

4月 3, 1999カテゴリ: /作成者:

The addition of important features in the latest version of SPAYN (1.7.3.R) makes it an even more useful and versatile statistical parameter and yield analysis tool. The list of spice models available in SPAYN has been expanded to include the EKV MOSFET model. The new “Golden Device” function locates the observation in a particular database that is closest to the theoretical mean observation. This “Golden Device” is then considered to be the average observation that best characterizes that database. Several new plotting symbols have been added to the scattergram plotting facility allowing a clearer graphical representation of data. It is also now possible to locate the position of the minimum or maximum record in a given database without the need to manually sort through the complete data set.

Mixed-Signal Simulation with SmartSpice in the Cadence Design Framework II

4月 2, 1999カテゴリ: /作成者:

Users of the Cadence Design Framework II (DFII, versions 4.4.0 and above) have been enjoying a tight integration between SmartSpice and the Analog Artist Electrical Design System and Composer Design Entry tools. This integration is achieved via the Cadence Spice Socket (cdsSpice) and the Open Analog Simulation Integration Socket (OASIS). It has been comprehensively documented in previous issues of the Simulation Standard, and also in a new application note (Ref No. SS/99-2).

Intrinsic Capacitance Parameter Extraction in UTMOST III

4月 1, 1999カテゴリ: /作成者:

The intrinsic capacitance parameter extraction routine (INTCAP) is in the CAP analysis section of the UTMOST III MOS module (Routine#67). The INTCAP routine has 5 different intrinsic cap measurements and a “simulation only” capability for all intrinsic caps. Recent developments have improved the INTCAP routine. Users should have UTMOST III MOS module version 15.2.0 or higher to be able use the examples and explanations presented in this article. The INTCAP routine allows users to measure the MOS capacitances when the device is under DC bias and conducting current.

Introducing Guardian – LVS Verification for PC-based Platforms

3月 1, 1999カテゴリ: /作成者:

Guardian is a (state-of-the-art) hierarchical netlist comparison system, which eliminates many of the disadvantages of existing programs. Running on PCs under Windows NT, it easily compares circuits with a large number of devices. The advanced algorithms implemented in Guardian allow a substantial reduction of execution time and also detect discrepancies between two netlists more precisely. Guardian generates a comprehensive hierarchical report, which is easy to read. An embedded tool, called the Spice Netlist Rover, links report files with source netlists to make inspecting correct matches and errors simple.

Mixed Circuit Device Simulation of Single Event Upset in a Memory Cell

2月 2, 1999カテゴリ: /作成者:

This article presents Single Event Upset (SEU) simulation of a SRAM cell using MixedMode3D. MixedMode3D provides the capability to simultaneously perform circuit simulation coupled with three-dimensional device simulation. This allows one to examine the internal operation of a three-dimensional numerically simulated device and predict the response of the attached circuit in a self consistent manner.

New, Fast Numerical Algorithm for Diffusion Modeling Implemented in ATHENA Version 5.0

2月 1, 1999カテゴリ: /作成者:

A new diffusion algorithm based on a Galerkin method with linear finite elements, an extremely fast sparse matrix solver, and object oriented physical modeling is one of the new features implemented in ATHENA version 5.0. This module is an alternative to the existing code, thus providing the user with a choice between using the old diffusion module and the new algorithms.