SmartSpice v.1.5.5 Release Notes

1 Models

1.1 BSIM3 Version 3.2 (Level=8) Model

1.1.1 Silvaco Model Implementation
The latest Berkeley BSIM3v3.2 model of June 16 1998 has been integrated into SmartSpice 1.5.5. The Silvaco implementation of the Berkeley BSIM3v3.2 model can be invoked by specifying the model selector LEVEL=8 and the version selector VERSION=3.2 in the .MODEL definition. This version is now used as the default BSIM3v3 model. Older BSIM3v3 models can be invoked by specifying VERSION=3.0 or VERSION=3.1.

1.2 BSIM3 Version 3 (Level=8) NQSMOD Model

A new improved Non-Quasi Static capacitance model was implemented in the BSIM3 v3.0, v3.1, and v3.2 Level=8 models. This model can be invoked by specifying the model or device selector NQSMOD=5. It is supported in the .TRAN and .AC analyses. The original Berkeley NQSMOD=1 model is also supported. To model MOSFET devices the NQSMOD=5 model is recommended rather than the NQSMOD=1 model.

1.3 BSIM3 Version 3 (Level=8) Noise Model

The SmartSpice common MOSFET noise model equations have been corrected in the BSIM3 Version 3.0/3.1/3.2 (Level=8) model. The model invoked by the selector NLEV is now consistent with the SmartSpice Modeling Manual.

1.4 BSIM3 Version 3.2 (Level=81) Model

The original Berkeley BSIM3v3.2 model implementation can be invoked by specifying the model selector LEVEL=81 in the .MODEL definition. This VERSION=3.2 is now used as the default BSIM3v3 model. Older BSIM3v3 models can be invoked by specifying VERSION=3.0 or VERSION=3.1. All .MODEL definitions in the input deck must specify the same BSIM3v3 model version. The BSIM3v3 v3.0, v3.1 and v3.2 models cannot be invoked simultaneously during the same run. The BSIM3v3.2 LEVEL=81 model implementation uses the original Berkeley BSIM3v3.2 source code. There is only one change: it allows output of charge and intrinsic capacitance values.

1.5 HVMOS (Level=88) Model

SmartSpice now supports a new BSIM3v3.2 based Level=88 MOSFET model. developed for high-voltage and analog applications.