• 技术刊物 Simulation Standard

Simulation Standard

Silvaco面向半导体工艺和器件仿真工程师推出的技术刊物

When solving for the static CV curve for a MOS capacitor, due to the absence of current carriers

When solving for the static CV curve for a MOS capacitor, due to the absence of current carriers, convergence can be a real problem. Previous methods suggested in the hints and tips archive of Silvaco’s simulation standard have made use of Silvaco’s Luminous module where a small amount of light intensity is incident on the device, the idea being to generate a small amount of carriers to aid convergence.

IBIS Models Now Supported in SmartSpice

Expert Parametric Wire (Pwire) is a complex group of objects containing, a single wire named master wire, any number of subparts such as enclosure wires, offset wires and sets of rectangles. Pwire objects enable extremely quick and efficient creation and editing of guard rings and shielded paths which are increasingly important due to higher integration density of IC designs.

Extraction of SPICE Model Parameters from Atlas Device Simulation Using Utmost

Many users would like to extract SPICE models from their process and device simulation using Athena and Atlas to be used in actual circuit simulation without actually fabricating the device.Using SILVACO's Utmost you can extract SPICE model parameters from the simulation results of Athena and Atlas.

Array Copying – Alignment from Specified Instance Number

For LCD and Memory designs, Array Copy function on Gateway is conveniently used. Users may want to align instances from specified instance number, for example starting from X100 or X1000. Here introduces a convenience way to realize it.

Hierarchical Layout versus Schematic

A new Hierarchical Layout versus Schematic (HLVS) system that provides significant improvement in verification of huge circuits is described. Other of LVS verification tools perform a netlist flattening and comparison in transistor level [1, 2]. These tools are based on standard graph isomorphism algorithms and are sufficiently efficient in practice.

Design of Optimal Spiral Inductors in Expert

IntroductionOne of the key components in many RF ICs applications is the inductor. It is very important that the inductor has optimal design, meaning optimal geometry with the best possible characteristics [1]. Our computer-aided optimization technique using geometric programming (GP) has been used to find the optimum design for spiral inductors with different layout [2-4]. The goal is selection of the best geometry of inductors to find optimal values of inductor parameters (the number of turns and layout dimensions) and then drawing layouts of optimal inductors. Silvaco Expert is a powerful tool for drawing spiral inductors with different mask geometry (square, octagonal or circular). In this paper we presents a simple way to draw layouts of optimal inductors in Expert, without using parameterized cells.