Simulation Standard
Silvaco面向半导体工艺和器件仿真工程师推出的技术刊物
Displacement Damage
Two fundamental damage mechanisms take place when devices are exposed to particle fluences: ionization and lattice displacement or just displacement damage. Ionization has previously been addressed in other simulation standard articles. Neutrons, protons, alpha particles, heavy ions, and very high-energy photons cause lattice displacement, or just displacement damage. Particle bombardment can change the arrangement of the atoms in the crystal lattice creating lasting damage, and increase the number of recombination (defect) centers depleting the minority carriers and degrading the analog properties of the affected semiconductor junctions. High dose rates of particles (particles/area-s) can cause partial annealing (“healing”) of the damaged lattice, leading to a lower degree of damage than with the same doses delivered in low intensity over a longer time period.
Radiation-Induced Current Leakage Between Two n-MOSFET’s
The Simulation Standard article “Simulating Radiation-Induced Shifts in MOSFET Threshold Voltage”1 gives a brief overview of the ways that ionizing radiation can affect semiconductor devices, and considers insulator charging in particular. In the Victory Device User’s Manual2 there is a more extensive discussion of radiation effects. Here we look at how insulator charging due to ionizing radiation can induce a leakage current between two MOSFET’s separated by a trench.
Multiple SEU Strike Simulations on a Six Transistor 20nm SRAM Cell
It is often not realized that more than one Single Event Upset (SEU) statement can be used in a simulation. Each SEU statement can locate a strike anywhere in the semiconductor and at any time during the transient, offering a range of simulation possibilities. One possible use for simulating multiple SEU strikes is for simulating spallation events, where a high energy particle, such as a cosmic ray, suffers a nuclear interaction, producing one or more different sources of ionizing particle at the nuclear reaction site. In this article, we will, demonstrate two SEU strikes in different locations at two different times on a full six transistor 22nm SRAM cell, including four layers of metal interconnect.
The Physics of Single Event Burnout (SEB)
Single Event Burnout in a diode, requires a specific set of circumstances to occur, since there is no intrinsic current gain in the device itself to amplify the currents created by the charge from a single event strike. What has to happen for Single Event Burnout (SEB) to occur in a device with no intrinsic gain, for realistic levels of Linear Energy Transfer (LET), for any given bias is fundamentally simple:
Hints, Tips, and Solutions – Types of 3D Delaunay Shape Refinement in Victory Process
The Victory Process cell mode Delaunay 3D device meshing algorithm already includes various TCAD-based local refinement algorithms to ensure accurate and robust device simulation. These include junction and interface distance refinement. One benefit of these approaches is that complex refinement behavior can be specified via a simple deck interface, but a limitation is that the results can only vary according to the small number of parameters of the schemes. In some cases, such as particle path refinement, it can be useful to have finer, more local control over the mesh and the shape distance refinement schemes have been produced to support this.
Hints, Tips and Solutions – Meshing a Non Axis Aligned SEU Beam
Q: I have an SEU beam in a 2D structure; the beam track is at an angle through the device. I don’t want to waste mesh by putting a fine mesh everywhere, is there anyway to mesh along the SEU beam track?A: Yes, and it is quite simple to do using DevEdit’s robust feature rich meshing engine.