{"id":37096,"date":"1998-03-03T17:44:26","date_gmt":"1998-03-03T17:44:26","guid":{"rendered":"https:\/\/silvaco.com\/%e6%9c%aa%e5%88%86%e7%b1%bb\/savage-enhanced-with-recognition-and-reporting-of-hierarchical-structure-of-errors\/"},"modified":"2021-10-13T10:58:44","modified_gmt":"2021-10-13T17:58:44","slug":"savage-enhanced-with-recognition-and-reporting-of-hierarchical-structure-of-errors","status":"publish","type":"post","link":"https:\/\/silvaco.com\/zh-hans\/simulation-standard-zh-hans\/savage-enhanced-with-recognition-and-reporting-of-hierarchical-structure-of-errors\/","title":{"rendered":"Savage Enhanced with Recognition and Reporting of Hierarchical Structure of Errors"},"content":{"rendered":"
\n

Savage Enhanced with Recognition and Reporting of Hierarchical Structure of Errors<\/h1>\n

Figure Introduction<\/p>\n

This article describes a method of reporting DRC errors implemented in\u00a0Savage<\/b>, applicable to multi-million transistor layouts. The method of hierarchical information inheritance is a perspective approach in an extension of capabilities of flat DRC systems. This technique makes it possible to report hierarchical errors in ordinary flat DRC systems.<\/p>\n

Advantages of Hierarchical Error Reports<\/p>\n

It is known that fully hierarchical DRC systems compare favorably with flat DRC systems because of some of their capabilities flat systems do not have. The higher performance on hierarchical designs and the more compact and informative error report are probably the two most important features of hierarchical systems. Of course, the former is due to their very nature. However, it is possible to implement the latter on the basis of flat DRC systems provided the input data is hierarchical. The main benefits of hierarchical error report are as follows.<\/p>\n<\/div><\/section><\/div>

<\/div>