{"id":37067,"date":"1998-06-02T17:19:19","date_gmt":"1998-06-02T17:19:19","guid":{"rendered":"https:\/\/silvaco.com\/%e6%9c%aa%e5%88%86%e7%b1%bb\/optimum-standard-cell-layout-using-weighted-cycle-linear-placement\/"},"modified":"2021-10-13T10:56:59","modified_gmt":"2021-10-13T17:56:59","slug":"optimum-standard-cell-layout-using-weighted-cycle-linear-placement","status":"publish","type":"post","link":"https:\/\/silvaco.com\/zh-hans\/simulation-standard-zh-hans\/optimum-standard-cell-layout-using-weighted-cycle-linear-placement\/","title":{"rendered":"Optimum Standard Cell Layout Using Weighted Cycle Linear Placement"},"content":{"rendered":"
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Optimum Standard Cell Layout Using Weighted Cycle Linear Placement<\/h1>\n

Introduction<\/p>\n

Placement and routing problems for integrated circuits are inherently interrelated and extremely complex from the algorithmic point of view. This complexity grows exponentially as the scale of integration increases. To cope with their complexity within fully automated design methodologies, a common approach is to restrict the design framework both in terms of the structure of the target circuit and design algorithms.<\/p>\n

A widely used approach is standard cell design (Fig. 1), in which almost all layout cells are of the same height, so it is convenient to arrange them in rows. If there some cells can be grouped in such a way that interconnects between the groups may be ignored or accounted for in some hierarchical way, then a locally-optimal placement of cells within each group may be approximated by the model of linear placement as shown in Figure 2. The quality of placement is estimated by some measure of interconnectivity provided that all wires run horizontally.<\/p>\n<\/div><\/section><\/div>

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