{"id":36681,"date":"2003-07-01T21:31:26","date_gmt":"2003-07-01T21:31:26","guid":{"rendered":"https:\/\/silvaco.com\/%e6%9c%aa%e5%88%86%e7%b1%bb\/shallow-trench-isolation-sti-effects-in-bsim4-and-hisim-mosfet-models-in-smartspice-utmost-iii\/"},"modified":"2021-10-13T10:41:37","modified_gmt":"2021-10-13T17:41:37","slug":"shallow-trench-isolation-sti-effects-in-bsim4-and-hisim-mosfet-models-in-smartspice-utmost-iii","status":"publish","type":"post","link":"https:\/\/silvaco.com\/zh-hans\/simulation-standard-zh-hans\/shallow-trench-isolation-sti-effects-in-bsim4-and-hisim-mosfet-models-in-smartspice-utmost-iii\/","title":{"rendered":"Shallow-Trench-Isolation (STI) Effects in BSIM4 and HiSIM MOSFET Models in SmartSpice &#038; UTMOST-III"},"content":{"rendered":"<div id='template_overview'  class='avia-section main_color avia-section-small avia-no-border-styling  avia-bg-style-scroll  avia-builder-el-0  el_before_av_section  avia-builder-el-first   container_wrap fullsize' style='background-color: #ffffff;  margin-top:0px; margin-bottom:0px; '  ><div class='container' ><main  role=\"main\" itemprop=\"mainContentOfPage\"  class='template-page content  av-content-full alpha units'><div class='post-entry post-entry-type-page post-entry-36681'><div class='entry-content-wrapper clearfix'>\n<div class='flex_column_table av-equal-height-column-flextable -flextable' style='margin-top:20px; margin-bottom:0px; '><div class=\"flex_column av_three_fourth  flex_column_table_cell av-equal-height-column av-align-top first  avia-builder-el-1  el_before_av_one_fourth  avia-builder-el-first  \" style='padding:0px 0px 0px 0px ; border-radius:0px; '><section class=\"av_textblock_section \"  itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/BlogPosting\" itemprop=\"blogPost\" ><div class='avia_textblock  '   itemprop=\"text\" ><h1>Shallow-Trench-Isolation (STI) Effects in BSIM4 and HiSIM MOSFET Models in SmartSpice &amp; UTMOST-III<\/h1>\n<h3>Introduction<\/h3>\n<p>Semiconductor devices are continuously improved with regard to intrinsic characteristics, as well as reduced geometries. Among all requirements, there is a need for an efficient device isolation technique as CMOS technologies are scaled down below the 0.25\u00b5m generation. Shallow Trench Isolation (STI) has become an essential isolation scheme as a replacement for LOCal Oxydation of Silicon (LOCOS). It allows reaching a higher packing density, tighter design rules, lower parasitics and higher yields. However, the basic STI process sequence involves several sources of mechanical strain, which can significantly increase the stress levels in the enclosed silicon area (Figure 1). It was shown that this stress in turn influences junction leakage but also MOS electrical characteristics. There are several ways to account for the effect of STI-induced stress in standard compact models. The purpose of this article is to present two different approaches developed by the universities of Berkeley and Hiroshima. In both cases, new equations were derived and new parameters have been introduced in the latest versions of BSIM4 and HiSIM compact models. These new versions are currently supported by Silvaco SmartSpice\/UTMOST softwares.<\/p>\n<\/div><\/section><\/div><div class='av-flex-placeholder'><\/div><div class=\"flex_column av_one_fourth  flex_column_table_cell av-equal-height-column av-align-top av-zero-column-padding   avia-builder-el-3  el_after_av_three_fourth  avia-builder-el-last  \" style='border-radius:0px; ' id=\"whitepaper\" ><p><div  class='avia-builder-widget-area clearfix  avia-builder-el-4  el_before_av_image  avia-builder-el-first '><div id=\"nav_menu-29\" class=\"widget clearfix widget_nav_menu\"><div class=\"menu-simulation-standard-side-menu-chinese-simplified-container\"><ul id=\"menu-simulation-standard-side-menu-chinese-simplified\" class=\"menu\"><li id=\"menu-item-35571\" class=\"menu-item menu-item-type-post_type menu-item-object-page menu-item-35571\"><a href=\"https:\/\/silvaco.com\/zh-hans\/technical-library\/simulation-standard\/\">Simulation Standard<\/a><\/li>\n<\/ul><\/div><\/div><\/div><br \/>\n<div  class='avia-image-container  av-styling-    avia-builder-el-5  el_after_av_sidebar  el_before_av_button  avia-align-center '  itemprop=\"image\" itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/ImageObject\"  ><div class='avia-image-container-inner'><div class='avia-image-overlay-wrap'><a href=\"\/dynamicweb\/jsp\/downloads\/DownloadDocStepsAction.do?req=download&amp;nm=simstd_jul_2003_a3.pdf\" class='avia_image' target=\"_blank\" rel=\"noopener noreferrer\"><img decoding=\"async\" width=\"644\" height=\"800\" class='wp-image-21988 avia-img-lazy-loading-not-21988 avia_image' src=\"https:\/\/silvaco.com\/wp-content\/uploads\/simulationstandard\/simstd_jul_2003_a3-e1611193516903.jpg\" alt='' title='simstd_jul_2003_a3'  itemprop=\"thumbnailUrl\"  \/><\/a><\/div><\/div><\/div><br \/>\n<div  class='avia-button-wrap avia-button-center  avia-builder-el-6  el_after_av_image  avia-builder-el-last ' ><a href='\/dynamicweb\/jsp\/downloads\/DownloadDocStepsAction.do?req=download&amp;nm=simstd_jul_2003_a3.pdf' class='avia-button  avia-color-grey   avia-icon_select-yes-right-icon avia-size-small avia-position-center ' target=\"_blank\" rel=\"noopener noreferrer\"><span class='avia_iconbox_title' >Download Simulation Standard<\/span><span class='avia_button_icon avia_button_icon_right' aria-hidden='true' data-av_icon='\ue875' data-av_iconfont='entypo-fontello'><\/span><\/a><\/div><\/p><\/div><\/div><!--close column table wrapper. Autoclose: 1 --><\/div><\/div><\/main><!-- close content main element --><\/div><\/div><div id='av_section_2'  class='avia-section main_color avia-section-small avia-no-border-styling  avia-bg-style-scroll  avia-builder-el-7  el_after_av_section  avia-builder-el-last   container_wrap fullsize' style='background-color: #ffffff;  margin-top:0px; margin-bottom:0px; '  ><div class='container' ><div class='template-page content  av-content-full alpha units'><div class='post-entry post-entry-type-page post-entry-36681'><div class='entry-content-wrapper clearfix'>\n<div class='flex_column_table av-equal-height-column-flextable -flextable' style='margin-top:20px; margin-bottom:0px; '><div class=\"flex_column av_one_full  flex_column_table_cell av-equal-height-column av-align-top first  avia-builder-el-8  avia-builder-el-no-sibling  \" style='padding:0px 0px 0px 0px ; border-radius:0px; '><\/div><\/div><!--close column table wrapper. Autoclose: 1 -->\n<\/p>\n","protected":false},"excerpt":{"rendered":"<p>There are several ways to account for the effect of STI-induced stress in standard compact models. The purpose of this article is to present two different approaches developed by the universities of Berkeley and Hiroshima. In both cases, new equations were derived and new parameters have been introduced in the latest versions of BSIM4 and HiSIM compact models. These new versions are currently supported by Silvaco SmartSpice\/UTMOST softwares.<\/p>\n","protected":false},"author":2,"featured_media":21988,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[7723],"tags":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO Premium plugin v24.0 (Yoast SEO v24.0) - https:\/\/yoast.com\/wordpress\/plugins\/seo\/ -->\n<title>Shallow-Trench-Isolation (STI) Effects in BSIM4 and HiSIM MOSFET Models in SmartSpice &amp; UTMOST-III - Silvaco<\/title>\n<meta name=\"description\" content=\"Shallow-Trench-Isolation (STI) Effects in BSIM4 and HiSIM MOSFET Models in SmartSpice &amp; UTMOST-III\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/silvaco.com\/zh-hans\/simulation-standard-zh-hans\/shallow-trench-isolation-sti-effects-in-bsim4-and-hisim-mosfet-models-in-smartspice-utmost-iii\/\" \/>\n<meta property=\"og:locale\" content=\"zh_CN\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Shallow-Trench-Isolation (STI) Effects in BSIM4 and HiSIM MOSFET Models in SmartSpice &amp; UTMOST-III\" \/>\n<meta property=\"og:description\" content=\"Shallow-Trench-Isolation (STI) Effects in BSIM4 and HiSIM MOSFET Models in SmartSpice &amp; UTMOST-III\" \/>\n<meta property=\"og:url\" content=\"https:\/\/silvaco.com\/zh-hans\/simulation-standard-zh-hans\/shallow-trench-isolation-sti-effects-in-bsim4-and-hisim-mosfet-models-in-smartspice-utmost-iii\/\" \/>\n<meta property=\"og:site_name\" content=\"Silvaco\" \/>\n<meta property=\"article:publisher\" content=\"https:\/\/www.facebook.com\/SilvacoSoftware\/\" \/>\n<meta property=\"article:published_time\" content=\"2003-07-01T21:31:26+00:00\" \/>\n<meta property=\"article:modified_time\" content=\"2021-10-13T17:41:37+00:00\" \/>\n<meta property=\"og:image\" content=\"https:\/\/silvaco.com\/wp-content\/uploads\/simulationstandard\/simstd_jul_2003_a3-e1611193516903.jpg\" \/>\n\t<meta property=\"og:image:width\" content=\"644\" \/>\n\t<meta property=\"og:image:height\" content=\"800\" \/>\n\t<meta property=\"og:image:type\" content=\"image\/jpeg\" \/>\n<meta name=\"author\" content=\"Graham Bell\" \/>\n<meta name=\"twitter:card\" content=\"summary_large_image\" \/>\n<meta name=\"twitter:creator\" content=\"@SilvacoSoftware\" \/>\n<meta name=\"twitter:site\" content=\"@SilvacoSoftware\" \/>\n<meta name=\"twitter:label1\" content=\"\u4f5c\u8005\" \/>\n\t<meta name=\"twitter:data1\" content=\"Graham Bell\" \/>\n\t<meta name=\"twitter:label2\" content=\"\u9884\u8ba1\u9605\u8bfb\u65f6\u95f4\" \/>\n\t<meta name=\"twitter:data2\" content=\"5 \u5206\" \/>\n<script type=\"application\/ld+json\" class=\"yoast-schema-graph\">{\"@context\":\"https:\/\/schema.org\",\"@graph\":[{\"@type\":\"WebPage\",\"@id\":\"https:\/\/silvaco.com\/zh-hans\/simulation-standard-zh-hans\/shallow-trench-isolation-sti-effects-in-bsim4-and-hisim-mosfet-models-in-smartspice-utmost-iii\/\",\"url\":\"https:\/\/silvaco.com\/zh-hans\/simulation-standard-zh-hans\/shallow-trench-isolation-sti-effects-in-bsim4-and-hisim-mosfet-models-in-smartspice-utmost-iii\/\",\"name\":\"Shallow-Trench-Isolation (STI) Effects in BSIM4 and HiSIM MOSFET Models in SmartSpice & UTMOST-III - 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