{"id":36536,"date":"2005-02-01T00:02:11","date_gmt":"2005-02-01T00:02:11","guid":{"rendered":"https:\/\/silvaco.com\/%e6%9c%aa%e5%88%86%e7%b1%bb\/process-and-device-simulation-of-field-emission-microtrides\/"},"modified":"2021-10-13T10:35:56","modified_gmt":"2021-10-13T17:35:56","slug":"process-and-device-simulation-of-field-emission-microtrides","status":"publish","type":"post","link":"https:\/\/silvaco.com\/zh-hans\/simulation-standard-zh-hans\/process-and-device-simulation-of-field-emission-microtrides\/","title":{"rendered":"Process and Device Simulation of Field Emission Microtrides"},"content":{"rendered":"
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Process and Device Simulation of Field Emission Microtrides<\/h1>\n

Introduction<\/h3>\n

One of the most beneficial merits of computer-based experiment using TCAD lies in its capability of a total simulation of the target device. One can consider its novel fabrication process and its device performance at the same time without time consuming and expensive experiments using real wafers. Take field emission microtriodes, for example.<\/p>\n

They have been studied for various applications such as field emission displays, high-power and high-frequency devices having high-operating temperature and radiation hardness. In order to fabricate the microtriodes, silicon wafer process technology is preferred because it is suitable in forming a sharp cone structure as its field emitter(1).<\/p>\n

Process Simulation<\/h3>\n

The electrical performance of the device is very sensitive to the physical configuration of its structure. Precise and stable fabrication processes are necessary. In many cases, compatibility with a conventional CMOS process is also required for the integration of driver circuits around it. One can investigate and optimize desirable process steps using\u00a0ATHENA<\/em><\/strong>\u00a0process simulator. Figure 1 shows simulated process steps for a microtriode, applying the idea developed for a field emitter array fabrication process(2). Starting from an n-type silicon bare wafer, masking oxide is deposited and patterned, then RIE etching is performed to get a base shape of the field emitter. The first oxidation sharpens the emitter. After forming a silicon nitride cap on it, the second oxidation is performed to complete the grid insulator and to adjust the position of grid electrodes. The nitride cap is removed and grid metal is deposited. The overlying structure on the emitter is removed by lift-off and RIE etching.<\/p>\n

Device Simulation<\/h3>\n

Once a desirable structure is obtained by\u00a0ATHENA<\/em><\/strong>\u00a0process simulation, one can transfer it to\u00a0ATLAS<\/em><\/strong>\u00a0device simulation directly. In some cases, remeshing suitable for device simulation may be needed to obtain a better convergence and that is easily done using an user-friendly interactive meshing tool\u00a0DevEdit<\/em><\/strong>. In order to estimate the electrical characteristics of the emitter, Fowler-Nordheim equation is used. Figure 2 shows electric potential contours and current flow lines at the anode and grid voltages of 800V and 10V respectively. It can be seen that the current flow lines respond very sensitively to slight irregularities in the shape of the structure. The final results of the emitter current vs. anode voltage curves at various grid voltages are shown in Figure 3.<\/p>\n<\/div><\/section><\/div>

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