{"id":35997,"date":"2018-10-01T23:30:55","date_gmt":"2018-10-01T23:30:55","guid":{"rendered":"https:\/\/silvaco.com\/%e6%9c%aa%e5%88%86%e7%b1%bb\/process-variation-alignment-and-beol-effects-on-circuit-level-performance\/"},"modified":"2021-10-13T09:43:15","modified_gmt":"2021-10-13T16:43:15","slug":"process-variation-alignment-and-beol-effects-on-circuit-level-performance","status":"publish","type":"post","link":"https:\/\/silvaco.com\/zh-hans\/simulation-standard\/process-variation-alignment-and-beol-effects-on-circuit-level-performance\/","title":{"rendered":"Process Variation, Alignment and BEOL Effects on Circuit Level Performance"},"content":{"rendered":"
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Process Variation, Alignment and BEOL Effects on Circuit Level Performance<\/h1>\n

(Fully Integrated 3D TCAD, through SPICE Model and RC Parasitic Extraction to Circuit Simulation Flow)<\/p>\n

Section 1: Introduction<\/strong><\/p>\n

As process nodes continue to shrink, the requirement for additional physics is gradually creeping into each stage of the design process. By way of illustration, TCAD simulations are becoming more atomistic in nature, SPICE models are becoming process-aware to take account of localized strain effects, and back or middle end of line (BEOL and MEOL) parasitics are moving from exclusively 2D rule based solutions to full 3D structure field solvers for numerous critical sections of the layout.<\/p>\n

With this extra requirement for additional physics at all stages of the design flow in mind, Silvaco has created a single design interactive environment, to flow seamlessly from 3D Process and Device TCAD, all the way though to final SPICE circuit simulation including SPICE Model Parameter extraction from the TCAD simulations and 3D field solved back end of line resistance and capacitance parasitics. Designers can choose which part of the flow they wish to concentrate on, and the level of detail required to solve issues of interest. The versatility of the flow allows entire sections of the flow to be left out if not required. For example, if SPICE model cards are sufficiently accurate, the designer can omit the TCAD sections of the flow and concentrate on the back and middle end of line design optimization on circuit performance using the BEOL 3D structure builder and RC parasitic field solver sections.<\/p>\n

This full 3D TCAD to SPICE Circuit Simulation flow is demonstrated allowing investigation of process, layout and alignment effects on final circuit level performance, using a high degree of automation within a universal iterative run time environment for every step in the sequence. Within each step in the flow, there is a huge range in the level of detail that can be accessed by the user, depending on which aspect or aspects of the design flow is of particular interest to the investigator. Aspects such as process parameters, stress effects, SPICE model fitting sequence, Back End Of Line (BEOL) parasitic resistance and capacitance optimization, to changes in circuit configuration can all be investigated in a single design environment with a single input command file. The tool flow sequence and user choices for each step are outlined in this article.<\/p>\n<\/div><\/section><\/div>

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