{"id":51684,"date":"2023-09-12T11:10:13","date_gmt":"2023-09-12T18:10:13","guid":{"rendered":"https:\/\/silvaco.com\/surge-virtual-event-north-america-2023\/"},"modified":"2026-01-08T14:36:17","modified_gmt":"2026-01-08T22:36:17","slug":"surge-virtual-event-north-america-2023","status":"publish","type":"page","link":"https:\/\/silvaco.com\/zh-hans\/corporate\/surge-virtual-event-north-america-2023\/","title":{"rendered":"SURGE Virtual Event North America 2023"},"content":{"rendered":"<div id='full_slider_1'  class='avia-fullwidth-slider main_color avia-shadow   avia-builder-el-0  el_before_av_section  avia-builder-el-first   container_wrap fullsize' style=' '  ><div   data-size='featured'  data-lightbox_size='large'  data-animation='slide'  data-conditional_play=''  data-ids='63860'  data-video_counter='0'  data-autoplay='false'  data-bg_slider='false'  data-slide_height=''  data-handle='av_slideshow_full'  data-interval='5'  data-class=' '  data-el_id=''  data-css_id=''  data-scroll_down=''  data-control_layout='av-control-default'  data-custom_markup=''  data-perma_caption=''  data-autoplay_stopper=''  data-image_attachment=''  data-min_height='0px'  data-lazy_loading='disabled'  data-src=''  data-position='top left'  data-repeat='no-repeat'  data-attach='scroll'  data-stretch=''  data-default-height='28.666666666667'  class='avia-slideshow avia-slideshow-1  av-control-default av-default-height-applied avia-slideshow-featured av_slideshow_full   avia-slide-slider '  itemprop=\"image\" itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/ImageObject\" ><ul class='avia-slideshow-inner ' style='padding-bottom: 15.933333333333%;' ><li  class=' av-single-slide slide-1 ' ><div data-rel='slideshow-1' class='avia-slide-wrap '   ><img decoding=\"async\" class=\"wp-image-63861 avia-img-lazy-loading-not-63861\"  src=\"https:\/\/silvaco.com\/wp-content\/uploads\/2026\/01\/SURGE_LandingPage_Banner3-1500x239.jpg\" width=\"1500\" height=\"239\" title='SURGE_LandingPage_Banner3' alt=''  itemprop=\"thumbnailUrl\"   \/><\/div><\/li><\/ul><\/div><\/div>\n<div id='av_section_1'  class='avia-section main_color avia-section-default avia-no-border-styling  avia-bg-style-scroll  avia-builder-el-1  el_after_av_slideshow_full  el_before_av_section   container_wrap fullsize' style=' '  ><div class='container' ><div class='template-page content  av-content-full alpha units'><div class='post-entry post-entry-type-page post-entry-51684'><div class='entry-content-wrapper clearfix'>\n<div class=\"flex_column av_one_full  flex_column_div av-zero-column-padding first  avia-builder-el-2  avia-builder-el-no-sibling  \" style='border-radius:0px; '><section class=\"av_textblock_section \"  itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/CreativeWork\" ><div class='avia_textblock  '   itemprop=\"text\" ><h1>SURGE Virtual Event North America 2023<\/h1>\n<p>Silvaco held its annual SURGE users event on October 26, 2023. You may view the event in the archive below.<\/p>\n<p>SURGE brings the TCAD, EDA, and IP communities together to discuss new technologies, share users\u2019 experiences, and discover innovative techniques for advanced semiconductor design.<\/p>\n<\/div><\/section><\/div>\n\n<\/div><\/div><\/div><!-- close content main div --><\/div><\/div><div id='av_section_2'  class='avia-section main_color avia-section-default avia-no-border-styling  avia-bg-style-scroll  avia-builder-el-4  el_after_av_section  el_before_av_section   container_wrap fullsize' style=' '  ><div class='container' ><div class='template-page content  av-content-full alpha units'><div class='post-entry post-entry-type-page post-entry-51684'><div class='entry-content-wrapper clearfix'>\n<div class=\"flex_column av_one_full  flex_column_div av-zero-column-padding first  avia-builder-el-5  avia-builder-el-no-sibling  \" style='border-radius:0px; '><section class=\"av_textblock_section \"  itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/CreativeWork\" ><div class='avia_textblock  '   itemprop=\"text\" ><h1 class=\"p4\" style=\"text-align: center;\"><span class=\"s2\">Agenda<\/span><\/h1>\n<\/div><\/section><br \/>\n<\/p><\/div>\n\n<\/div><\/div><\/div><!-- close content main div --><\/div><\/div><div id='babak_t'  class='avia-section main_color avia-section-default avia-no-border-styling  avia-bg-style-scroll  mfp-hide  container_wrap fullsize' style=' '  ><div class='container' ><div class='template-page content  av-content-full alpha units'><div class='post-entry post-entry-type-page post-entry-51684'><div class='entry-content-wrapper clearfix'>\n<div class=\"flex_column av_one_fourth  flex_column_div av-zero-column-padding first  \" style='border-radius:0px; '><div  class='avia-image-container  av-styling-    avia-align-center '  itemprop=\"image\" itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/ImageObject\"  ><div class='avia-image-container-inner'><div class='avia-image-overlay-wrap'><img decoding=\"async\" class='wp-image-19987 avia-img-lazy-loading-not-19987 avia_image' src=\"https:\/\/silvaco.com\/wp-content\/uploads\/2020\/03\/babak-210x300.jpg\" alt='' title='babak' height=\"300\" width=\"210\"  itemprop=\"thumbnailUrl\" srcset=\"https:\/\/silvaco.com\/wp-content\/uploads\/2020\/03\/babak-210x300.jpg 210w, https:\/\/silvaco.com\/wp-content\/uploads\/2020\/03\/babak-26x37.jpg 26w, https:\/\/silvaco.com\/wp-content\/uploads\/2020\/03\/babak-39x55.jpg 39w, https:\/\/silvaco.com\/wp-content\/uploads\/2020\/03\/babak-34x48.jpg 34w, https:\/\/silvaco.com\/wp-content\/uploads\/2020\/03\/babak.jpg 400w\" sizes=\"(max-width: 210px) 100vw, 210px\" \/><\/div><\/div><\/div><\/div><div class=\"flex_column av_three_fourth  flex_column_div av-zero-column-padding   \" style='border-radius:0px; '><section class=\"av_textblock_section \"  itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/CreativeWork\" ><div class='avia_textblock  '   itemprop=\"text\" ><h3>Speaker:<\/h3>\n<p><strong>Dr. Babak Taheri, <\/strong><strong>Chief Executive Officer and Board Member<br \/>\nSilvaco, Inc.<\/strong><\/p>\n<p>Babak A. Taheri, Ph.D., has served as Silvaco\u2019s Chief Executive Officer and member of Silvaco\u2019s board of directors from August 2019 to September 2021 and from November 2021 to present. From October 2018 to August 2019, Dr. Taheri served as Silvaco\u2019s Chief Technology Officer and Executive Vice President of Products. Prior to joining Silvaco, Dr. Taheri served as Chief Executive Officer and President of Integrated Biosensing Technologies (IBT), an advisory and consulting firm, from May 2015 to October 2018. Dr. Taheri has also served on various advisory boards, including MEMS World Summit, a conference for MEMS manufacturers, equipment and material suppliers and research institutes, Novasentis, Inc., an electromechanical polymer technology development company, and as the advisory board chair of the electrical engineering department at the University of California, Davis. Dr. Taheri also served on the board of directors of Parisi House on The Hill, a residential alcohol and drug non-profit, from June 2021 to May 2022. Dr. Taheri received a B.S. in engineering from San Francisco State University, a M.S. in electrical engineering from San Jose State University and a Ph.D. in biomedical engineering from the University of California, Davis.<\/p>\n<\/div><\/section><\/div>\n\n<\/div><\/div><\/div><!-- close content main div --><\/div><\/div><div id='patrick_g'  class='avia-section main_color avia-section-default avia-no-border-styling  avia-bg-style-scroll  mfp-hide  container_wrap fullsize' style=' '  ><div class='container' ><div class='template-page content  av-content-full alpha units'><div class='post-entry post-entry-type-page post-entry-51684'><div class='entry-content-wrapper clearfix'>\n<div class=\"flex_column av_one_fourth  flex_column_div av-zero-column-padding first  \" style='border-radius:0px; '><div  class='avia-image-container  av-styling-    avia-align-center '  itemprop=\"image\" itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/ImageObject\"  ><div class='avia-image-container-inner'><div class='avia-image-overlay-wrap'><img decoding=\"async\" class='wp-image-43831 avia-img-lazy-loading-not-43831 avia_image' src=\"https:\/\/silvaco.com\/wp-content\/uploads\/2022\/10\/PatrickGroeneveld.jpg\" alt='Patrick Groeneveld' title='PatrickGroeneveld' height=\"300\" width=\"210\"  itemprop=\"thumbnailUrl\" srcset=\"https:\/\/silvaco.com\/wp-content\/uploads\/2022\/10\/PatrickGroeneveld.jpg 210w, https:\/\/silvaco.com\/wp-content\/uploads\/2022\/10\/PatrickGroeneveld-26x37.jpg 26w, https:\/\/silvaco.com\/wp-content\/uploads\/2022\/10\/PatrickGroeneveld-39x55.jpg 39w, https:\/\/silvaco.com\/wp-content\/uploads\/2022\/10\/PatrickGroeneveld-34x48.jpg 34w\" sizes=\"(max-width: 210px) 100vw, 210px\" \/><\/div><\/div><\/div><\/div><div class=\"flex_column av_three_fourth  flex_column_div av-zero-column-padding   \" style='border-radius:0px; '><section class=\"av_textblock_section \"  itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/CreativeWork\" ><div class='avia_textblock  '   itemprop=\"text\" ><h1><span class=\"TextRun BCX0 SCXP161215005\" lang=\"EN-US\" xml:lang=\"EN-US\" data-scheme-color=\"@000000,,\" data-usefontface=\"false\" data-contrast=\"none\"><span class=\"NormalTextRun BCX0 SCXP161215005\">Machine Learning: A New Revolution for EDA<\/span><\/span><\/h1>\n<h3>Abstract:<\/h3>\n<p>The EDA design flow uses a complex chain of algorithms to transform a functional description into a mask pattern. Some of the algorithms use numerical solvers, others are just clever heuristics that have proven to work. Each algorithm has a large variety of parameters that are hand-tuned tuned for best results. For instance, area and speed are traded off using relative cost parameters. Some recent tools apply Machine learning to automatically converge quickly on a design-specific set of parameters. This is done by brute force running the flow many times and using PPA data to discover the gradients.<\/p>\n<p>Research work is done on making true ML-driven EDA tools. Some address placement, other routing strategies. In this presentation we will address the state of the art of ML in EDA flows and present an outlook of its impact in the coming decade.<\/p>\n<h3>Speaker:<\/h3>\n<p><strong>Dr. Patrick Groeneveld<\/strong><\/p>\n<p>Dr. Patrick Groenveld. Patrick has worked at Magma, Cadence, Synopsys and Cerebras, and he lectures at Stanford. He has worked for many years in the EDA industry. He was Chief Technologist at Magma Design Automation where he was part of the team that developed a groundbreaking RTL-to-GDS2 synthesis product. Patrick was also a Full Professor of Electrical Engineering at Eindhoven University. He is a lecturer in the EE department at Stanford University and serves as finance chair in the Executive Committee of the Design Automation Conference. Patrick received his MSc and PhD degrees from Delft University of Technology in the Netherlands.<\/p>\n<\/div><\/section><\/div>\n\n<\/div><\/div><\/div><!-- close content main div --><\/div><\/div><div id='tower_semi'  class='avia-section main_color avia-section-default avia-no-border-styling  avia-bg-style-scroll  mfp-hide  container_wrap fullsize' style=' '  ><div class='container' ><div class='template-page content  av-content-full alpha units'><div class='post-entry post-entry-type-page post-entry-51684'><div class='entry-content-wrapper clearfix'>\n<div class=\"flex_column av_one_fourth  flex_column_div av-zero-column-padding first  \" style='border-radius:0px; '><div  class='avia-image-container  av-styling-    avia-align-center '  itemprop=\"image\" itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/ImageObject\"  ><div class='avia-image-container-inner'><div class='avia-image-overlay-wrap'><img decoding=\"async\" class='wp-image-51833 avia-img-lazy-loading-not-51833 avia_image' src=\"https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/ofer_tamir.jpg\" alt='Ofer Tamir' title='ofer_tamir' height=\"300\" width=\"210\"  itemprop=\"thumbnailUrl\" srcset=\"https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/ofer_tamir.jpg 210w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/ofer_tamir-26x37.jpg 26w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/ofer_tamir-39x55.jpg 39w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/ofer_tamir-34x48.jpg 34w\" sizes=\"(max-width: 210px) 100vw, 210px\" \/><\/div><\/div><\/div><\/div><div class=\"flex_column av_three_fourth  flex_column_div av-zero-column-padding   \" style='border-radius:0px; '><section class=\"av_textblock_section \"  itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/CreativeWork\" ><div class='avia_textblock  '   itemprop=\"text\" ><h1>Silvaco and Tower Collaboration in Design Kit and Standard Cell Library Development and QA<\/h1>\n<h3>Abstract:<\/h3>\n<p>Silvaco is the main Standard Cell library provider for Tower cross all technologies. Recently we developed libraries for 65nm advanced Power Management process that includes advance characterization and MTBF performance calculation.<\/p>\n<p>Silvaco has a full analog design flow and Tower as the lead analog foundry to support and qualify its iPDK and SPICE using Silvaco\u2019s flow \u2013 including tools like \u2013 Expert , Gateway , SmartLVS and SmartDRC.<\/p>\n<h3>Speaker:<\/h3>\n<p><strong>Ofer Tamir, Managing Director, CAD, Design Enablement and Support<\/strong><br \/>\n<strong>Tower Semiconductor<\/strong><\/p>\n<p>Ofer joined Tower in 2001 as Director of Design enablement and CAD. Ofer is responsible for all design kits development, WW design support and CAD teams. Has more than 30 years of EDA and CAD experience, working at National Semiconductor (Now TI), DSPG and Tower. Ofer is also responsible for EDA relations and as such participates and presents at different technical conferences \u2013 such as DAC, Tech forums, and more.<\/p>\n<\/div><\/section><\/div>\n\n<\/div><\/div><\/div><!-- close content main div --><\/div><\/div><div id='eric_g'  class='avia-section main_color avia-section-default avia-no-border-styling  avia-bg-style-scroll  mfp-hide  container_wrap fullsize' style=' '  ><div class='container' ><div class='template-page content  av-content-full alpha units'><div class='post-entry post-entry-type-page post-entry-51684'><div class='entry-content-wrapper clearfix'>\n<div class=\"flex_column av_one_fourth  flex_column_div av-zero-column-padding first  \" style='border-radius:0px; '><div  class='avia-image-container  av-styling-    avia-align-center '  itemprop=\"image\" itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/ImageObject\"  ><div class='avia-image-container-inner'><div class='avia-image-overlay-wrap'><img decoding=\"async\" class='wp-image-20017 avia-img-lazy-loading-not-20017 avia_image' src=\"https:\/\/silvaco.com\/wp-content\/uploads\/2020\/03\/eric_g_lg-210x300.jpg\" alt='Eric Guichard' title='Eric Guichard' height=\"300\" width=\"210\"  itemprop=\"thumbnailUrl\" srcset=\"https:\/\/silvaco.com\/wp-content\/uploads\/2020\/03\/eric_g_lg-210x300.jpg 210w, https:\/\/silvaco.com\/wp-content\/uploads\/2020\/03\/eric_g_lg-26x37.jpg 26w, https:\/\/silvaco.com\/wp-content\/uploads\/2020\/03\/eric_g_lg-39x55.jpg 39w, https:\/\/silvaco.com\/wp-content\/uploads\/2020\/03\/eric_g_lg-34x48.jpg 34w, https:\/\/silvaco.com\/wp-content\/uploads\/2020\/03\/eric_g_lg.jpg 400w\" sizes=\"(max-width: 210px) 100vw, 210px\" \/><\/div><\/div><\/div><\/div><div class=\"flex_column av_three_fourth  flex_column_div av-zero-column-padding   \" style='border-radius:0px; '><section class=\"av_textblock_section \"  itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/CreativeWork\" ><div class='avia_textblock  '   itemprop=\"text\" ><h1>TCAD Simulation Update<\/h1>\n<h3>Abstract:<\/h3>\n<p>Dr. Guichard will provide an update on Silvaco TCAD Victory simulation products, the importance of TCAD in the development of next-generation devices, and the future of TCAD development.<\/p>\n<h3>Speaker:<\/h3>\n<p><strong>Dr Eric Guichard, SVP and GM of TCAD <span class=\"s1\">Business Unit<\/span><\/strong><br \/>\n<strong>Silvaco, Inc.<\/strong><\/p>\n<p class=\"p1\"><span class=\"s1\">Eric Guichard, Ph.D., has served as Silvaco\u2019s Senior Vice President and General Manager of TCAD Business Unit since November 2012, and as Silvaco\u2019s Vice President of Applications from July 2008 to November 2012. From September 1995 to July 2008, Dr. Guichard served in various roles with Silvaco SA, formerly known as Silvaco Data Systems, one of Silvaco\u2019s wholly-owned subsidiaries, including as an applications engineer. Dr. Guichard received a M.S. in material science and a Ph.D. in semiconductor physics from Institut Polytechnique de Grenoble, France.<\/span><\/p>\n<\/div><\/section><\/div>\n\n<\/div><\/div><\/div><!-- close content main div --><\/div><\/div><div id='st_micro'  class='avia-section main_color avia-section-default avia-no-border-styling  avia-bg-style-scroll  mfp-hide  container_wrap fullsize' style=' '  ><div class='container' ><div class='template-page content  av-content-full alpha units'><div class='post-entry post-entry-type-page post-entry-51684'><div class='entry-content-wrapper clearfix'>\n<div class=\"flex_column av_one_fourth  flex_column_div av-zero-column-padding first  \" style='border-radius:0px; '><div  class='avia-image-container  av-styling-    avia-align-center '  itemprop=\"image\" itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/ImageObject\"  ><div class='avia-image-container-inner'><div class='avia-image-overlay-wrap'><img decoding=\"async\" class='wp-image-51497 avia-img-lazy-loading-not-51497 avia_image' src=\"https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/salvatore_c.jpg\" alt='Salvatore CASCINO' title='salvatore_c' height=\"300\" width=\"210\"  itemprop=\"thumbnailUrl\" srcset=\"https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/salvatore_c.jpg 210w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/salvatore_c-26x37.jpg 26w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/salvatore_c-39x55.jpg 39w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/salvatore_c-34x48.jpg 34w\" sizes=\"(max-width: 210px) 100vw, 210px\" \/><\/div><\/div><\/div><\/div><div class=\"flex_column av_three_fourth  flex_column_div av-zero-column-padding   \" style='border-radius:0px; '><section class=\"av_textblock_section \"  itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/CreativeWork\" ><div class='avia_textblock  '   itemprop=\"text\" ><h1>Impact of Surface Defect Dot on Short Circuit Phenomena<\/h1>\n<h3>Abstract:<\/h3>\n<p>During switching operations, it can happen devices could be reaching overload abnormal condition. Some applications require robustness specifications (for example in Short Circuit and UIS test). Such phenomena can be simulated by mixed-mode circuits and an accurate tuning of simulation parameters, thanks to simulation\/experiment information exchange, allows us to predict electrothermal behavior during dynamic phase. As an example, we report here a study of short circuit phenomenon. Impact on short circuit of a defect localized in active area has been investigated by means of TCAD simulations performed with Silvaco software. Different cases have been studied in which the defect dot was localized at flat interface body\/drain, at SiC\/oxide interface in the channel region, at curved interface body\/drain. A sensitivity with position has been performed too.<\/p>\n<h3>Speaker:<\/h3>\n<p><strong>Salvatore Cascino, SiC R&amp;D Engineer<\/strong><br \/>\n<strong>ST Microelectronics<\/strong><\/p>\n<p>Salvatore Cascino was born in Palermo (Italy) in 1970. He obtained a Degree in Physics from the University of Palermo. He was involved at ENEA (Frascati &#8211; Rome) with Nuclear Fusion Department (FTU project) and with the Fusion Research group in Padua (RFX project). He is currently at STMicroelectronics (Catania) with the R&amp;D Group and his current research interest is aimed to technology development for Silicon Carbide devices. In the past he worked on development of devices for sensing applications and radiofrequency, too.<\/p>\n<\/div><\/section><\/div>\n\n<\/div><\/div><\/div><!-- close content main div --><\/div><\/div><div id='st_micro2'  class='avia-section main_color avia-section-default avia-no-border-styling  avia-bg-style-scroll  mfp-hide  container_wrap fullsize' style=' '  ><div class='container' ><div class='template-page content  av-content-full alpha units'><div class='post-entry post-entry-type-page post-entry-51684'><div class='entry-content-wrapper clearfix'>\n<div class=\"flex_column av_one_fourth  flex_column_div av-zero-column-padding first  \" style='border-radius:0px; '><div  class='avia-image-container  av-styling-    avia-align-center '  itemprop=\"image\" itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/ImageObject\"  ><div class='avia-image-container-inner'><div class='avia-image-overlay-wrap'><img decoding=\"async\" class='wp-image-51872 avia-img-lazy-loading-not-51872 avia_image' src=\"https:\/\/silvaco.com\/wp-content\/uploads\/2023\/10\/giovanni_g.jpg\" alt='Giovanni Giorgino' title='giovanni_g' height=\"300\" width=\"210\"  itemprop=\"thumbnailUrl\" srcset=\"https:\/\/silvaco.com\/wp-content\/uploads\/2023\/10\/giovanni_g.jpg 210w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/10\/giovanni_g-26x37.jpg 26w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/10\/giovanni_g-39x55.jpg 39w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/10\/giovanni_g-34x48.jpg 34w\" sizes=\"(max-width: 210px) 100vw, 210px\" \/><\/div><\/div><\/div><\/div><div class=\"flex_column av_three_fourth  flex_column_div av-zero-column-padding   \" style='border-radius:0px; '><section class=\"av_textblock_section \"  itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/CreativeWork\" ><div class='avia_textblock  '   itemprop=\"text\" ><h1>Study of Magnesium Activation Effect on Pinch-Off Voltage of Normally-Off p-GaN HEMTs for Power Applications<\/h1>\n<h3>Abstract:<\/h3>\n<p>The role of the magnesium (Mg) doping and its electrical activation on the off-state of p-GaN\/AlGaN\/GaN HEMTs has been investigated in this work. Firstly, the effect of different Mg doping profiles has been studied via the help of Technology Computer-Aided Design (TCAD) simulations, with the objective of analyzing the band diagrams of the structure. Then, it has been shown how experimental Capacitance\u2013Voltage measurements can be useful to obtain information on the net acceptor concentration in the p-GaN.<\/p>\n<p>As a result, devices with an undoped (magnesium-free) GaN gate have been experimentally compared to devices whose p-GaN gate has been activated via a reference annealing process. Finally, results on a device characterized by an improved p-GaN activation have been presented and compared, showing improvements on several parameters of both off- and on-state, thus underlining the key role of the Mg activation process in the overall performances of normally-off GaN HEMTs.<\/p>\n<h3>Speaker:<\/h3>\n<p><strong>Giovanni Giorgino, GaN Device Engineer for ADG R&amp;D Power &amp; Discretes<\/strong><br \/>\n<strong>STMicroelectronics<\/strong><\/p>\n<p>Giovanni Giorgino received his master\u2019s degree in electronic engineering from Polytechnic University of Turin, Italy, in 2020. Since 2020 he is working as GaN Device Engineer at STMicroelectronics of Catania in R&amp;D department. He has a background in semiconductor physics, analog and power electronics. He is currently involved in the development, characterization and modelling of p-GaN gate devices for power applications.<\/p>\n<\/div><\/section><\/div>\n\n<\/div><\/div><\/div><!-- close content main div --><\/div><\/div><div id='bogdan_t'  class='avia-section main_color avia-section-default avia-no-border-styling  avia-bg-style-scroll  mfp-hide  container_wrap fullsize' style=' '  ><div class='container' ><div class='template-page content  av-content-full alpha units'><div class='post-entry post-entry-type-page post-entry-51684'><div class='entry-content-wrapper clearfix'>\n<div class=\"flex_column av_one_fourth  flex_column_div av-zero-column-padding first  \" style='border-radius:0px; '><div  class='avia-image-container  av-styling-    avia-align-center '  itemprop=\"image\" itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/ImageObject\"  ><div class='avia-image-container-inner'><div class='avia-image-overlay-wrap'><img decoding=\"async\" class='wp-image-18835 avia-img-lazy-loading-not-18835 avia_image' src=\"https:\/\/silvaco.com\/wp-content\/uploads\/2020\/02\/Bogdan-Tudor1-200x300.jpg\" alt='' title='Bogdan-Tudor[1]' height=\"300\" width=\"200\"  itemprop=\"thumbnailUrl\" srcset=\"https:\/\/silvaco.com\/wp-content\/uploads\/2020\/02\/Bogdan-Tudor1-200x300.jpg 200w, https:\/\/silvaco.com\/wp-content\/uploads\/2020\/02\/Bogdan-Tudor1-25x37.jpg 25w, https:\/\/silvaco.com\/wp-content\/uploads\/2020\/02\/Bogdan-Tudor1-37x55.jpg 37w, https:\/\/silvaco.com\/wp-content\/uploads\/2020\/02\/Bogdan-Tudor1-32x48.jpg 32w, https:\/\/silvaco.com\/wp-content\/uploads\/2020\/02\/Bogdan-Tudor1.jpg 381w\" sizes=\"(max-width: 200px) 100vw, 200px\" \/><\/div><\/div><\/div><\/div><div class=\"flex_column av_three_fourth  flex_column_div av-zero-column-padding   \" style='border-radius:0px; '><section class=\"av_textblock_section \"  itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/CreativeWork\" ><div class='avia_textblock  '   itemprop=\"text\" ><h1 class=\"p1\"><span class=\"s1\"><span class=\"TextRun BCX0 SCXP95367978\" lang=\"EN-US\" xml:lang=\"EN-US\" data-scheme-color=\"@000000,,\" data-usefontface=\"true\" data-contrast=\"none\"><span class=\"NormalTextRun BCX0 SCXP95367978\">Power Device Modeling for SPICE<\/span><\/span><\/span><\/h1>\n<h3 class=\"p1\"><span class=\"s1\">Abstract:<\/span><\/h3>\n<p class=\"p1\"><span class=\"s1\">We start by examining the different technologies used in the manufacturing of power devices, including Si, GaN and SiC, considering their respective particularities and advantages.<\/span><\/p>\n<p class=\"p1\"><span class=\"s1\">We will then analyze various approaches to the SPICE modeling of Power devices, including compact models and macromodels.<\/span><\/p>\n<p class=\"p1\"><span class=\"s1\">A significant portion of our presentation will be dedicated to the topic of Power FET modeling. In particular we will illustrate how to properly address their specific bias-dependent capacitances and how to deal with model tuning based on dynamic characteristics.<\/span><\/p>\n<p class=\"p1\"><span class=\"s1\">Finally, we will share some of our expertise in dealing with the unique challenges of power devices, including parasitic elements and model accuracy.<br \/>\n<\/span><\/p>\n<h3>Speaker:<\/h3>\n<p><strong>Bogdan Tudor, Senior Manager, Device Characterization<\/strong><br \/>\n<strong> Silvaco, Inc.\u200b<\/strong><\/p>\n<p>Bogdan Tudor is Head of Device Characterization for Silvaco, leading the Utmost and Modeling Service teams. He has over 20 years of experience in model development and characterization software.<\/p>\n<p class=\"p1\"><strong>\u200b\u200b\u200b<\/strong><\/p>\n<\/div><\/section><\/div>\n\n<\/div><\/div><\/div><!-- close content main div --><\/div><\/div><div id='eldad_b-t'  class='avia-section main_color avia-section-default avia-no-border-styling  avia-bg-style-scroll  mfp-hide  container_wrap fullsize' style=' '  ><div class='container' ><div class='template-page content  av-content-full alpha units'><div class='post-entry post-entry-type-page post-entry-51684'><div class='entry-content-wrapper clearfix'>\n<div class=\"flex_column av_one_fourth  flex_column_div av-zero-column-padding first  \" style='border-radius:0px; '><\/div><div class=\"flex_column av_three_fourth  flex_column_div av-zero-column-padding   \" style='border-radius:0px; '><section class=\"av_textblock_section \"  itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/CreativeWork\" ><div class='avia_textblock  '   itemprop=\"text\" ><h1>Silvaco Simulation Tools Assisting GaN-based Power Devices Design and Development<\/h1>\n<h3>Abstract<\/h3>\n<p>Large amount of research efforts was invested in the last two decades in wideband gap GaN based lateral power devices, which are currently approaching commercial maturity for power electronic switching up to 650 V class. Yet, they do not approach their theoretical material limit, in terms of RDS_ON \u00d7 A vs. VBr. Among the reasons for this limitation are trade off between the blocking strength and the increase of dispersion and the vertical blocking strength of GaN on Si substrates. Among the different approaches to overcome these challenges, two device technologies may be pointed out; vertical GaN based devices and ultra-wideband gap lateral HFET with AlN buffer. Vertical GaN based transistors are desired due to their reduced wafer \u201cfoot print\u201d, in comparison to lateral HFETs, that results in a reduction of RDS_ON \u00d7 A by one order of magnitude down to 1.0 m\uf057\u2219cm2. In addition, the possibility of strain free homoepitaxy allows the growth of thick drift layers with low residual background doping for blocking capability larger than 1 kV. Lateral GaN based transistors (HFETs) with un-intentional doped AlN as buffer material and with high conduction band offset at the AlN-buffer \/ GaN channel interface should effectively confine the GaN transistor channel. This will result into blocking strength enhancement and low dispersion effects.<\/p>\n<p>Physical based simulation tools are essential for the development and insight to these new generation of wide band gap electronic devices in FBH laboratories. In this talk, we will give examples for the use of \u201cSilvaco\u201d simulation tools used to design, predict and analysis the electrical characterization of vertical and lateral GaN based power devices. The conductance properties of GaN based fin MISFETs are explored and compared to experimental characteristics. The conductance properties are predicted with the variation of geometrical dimensions and the epitaxial layers properties. Edge termination topologies in vertical GaN devices are engineered using avalanche models and compared to experimental and theoretical values. Finally, insight to trapping and de trapping effects AlN \/ GaN lateral HFET gives explanation to dynamic ON state resistance peculiarity using avalanche model specific to the device epitaxial structure.<\/p>\n<h3>Speaker:<\/h3>\n<p><strong>Dr. Eldad Bahat-Treidel, Senior Scientist<\/strong><br \/>\n<strong>Ferdinand-Braun-Institut (FBH)<\/strong><\/p>\n<p>Eldad Bahat-Treidel received his B.Sc. degree in chemical process engineering and M.Sc. degree in electro-optic engineering from Ben Gurion University, Be\u2019er Sheva, Israel in 1996 and 2004 respectively. He received his Ph.D. ( Dr. Ing. ) in electrical engineering from the Technische Universit\u00e4t Berlin Germany in 2012. In 1996 he joint Intel electronics LTD as a photolithography critical layers process engineer, and then joined in 2004 Tower semiconductor LTD as a senior research and development photolithography engineer. In 2006 he joined the Ferdinand-Braun-Institut gGmbH, Leibniz-Institut f\u00fcr H\u00f6chstfrequenztechnik (FBH) in Berlin for the development GaN switching transistors for high voltage power electronics applications. Since 2014 he is working on the research and development of innovative electronic devices such vertical GaN based transistors.<\/p>\n<\/div><\/section><\/div>\n\n<\/div><\/div><\/div><!-- close content main div --><\/div><\/div><div id='debo_o'  class='avia-section main_color avia-section-default avia-no-border-styling  avia-bg-style-scroll  mfp-hide  container_wrap fullsize' style=' '  ><div class='container' ><div class='template-page content  av-content-full alpha units'><div class='post-entry post-entry-type-page post-entry-51684'><div class='entry-content-wrapper clearfix'>\n<div class=\"flex_column av_one_fourth  flex_column_div av-zero-column-padding first  \" style='border-radius:0px; '><div  class='avia-image-container  av-styling-    avia-align-center '  itemprop=\"image\" itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/ImageObject\"  ><div class='avia-image-container-inner'><div class='avia-image-overlay-wrap'><img decoding=\"async\" class='wp-image-51418 avia-img-lazy-loading-not-51418 avia_image' src=\"https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/debo_o.jpg\" alt='Debp' title='debo_o' height=\"300\" width=\"210\"  itemprop=\"thumbnailUrl\" srcset=\"https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/debo_o.jpg 210w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/debo_o-26x37.jpg 26w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/debo_o-39x55.jpg 39w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/debo_o-34x48.jpg 34w\" sizes=\"(max-width: 210px) 100vw, 210px\" \/><\/div><\/div><\/div><\/div><div class=\"flex_column av_three_fourth  flex_column_div av-zero-column-padding   \" style='border-radius:0px; '><section class=\"av_textblock_section \"  itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/CreativeWork\" ><div class='avia_textblock  '   itemprop=\"text\" ><h1>Going Beyond CMOS in Memories<\/h1>\n<h3>Abstract:<\/h3>\n<p>In his presentation to Silvaco\u2019s User Group, Debo will introduce Kepler Computing, talk on why Kepler was formed, what the company is doing to enable Design Beyond CMOS, particularly for memory applications, and the use of Silvaco TCAD to simulate these new memories.<\/p>\n<h3>Speaker:<\/h3>\n<p><strong>Debo Olaosebikan, Co-Founder and CEO <\/strong><br \/>\n<strong>Kepler Computing<\/strong><\/p>\n<p>Debo is an entrepreneur, physicist and engineer based in San Francisco who, prior to Kepler, was Co-Founder and Chief Technology Officer of Gigster. He was a physics PhD candidate at Cornell University, where he was lead researcher from Cornell working to build an electric silicon laser. He researched spintronics at IBM Almaden and was the Future Africa Awards &#8211; Best Use of Science Winner in 2011. Debo invests and advises startups and was a mentor at the Thiel Fellowship.<\/p>\n<\/div><\/section><\/div>\n\n<\/div><\/div><\/div><!-- close content main div --><\/div><\/div><div id='cea_leti'  class='avia-section main_color avia-section-default avia-no-border-styling  avia-bg-style-scroll  mfp-hide  container_wrap fullsize' style=' '  ><div class='container' ><div class='template-page content  av-content-full alpha units'><div class='post-entry post-entry-type-page post-entry-51684'><div class='entry-content-wrapper clearfix'>\n<div class=\"flex_column av_one_fourth  flex_column_div av-zero-column-padding first  \" style='border-radius:0px; '><div  class='avia-image-container  av-styling-    avia-align-center '  itemprop=\"image\" itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/ImageObject\"  ><div class='avia-image-container-inner'><div class='avia-image-overlay-wrap'><img decoding=\"async\" class='wp-image-51564 avia-img-lazy-loading-not-51564 avia_image' src=\"https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/francois_t.jpg\" alt='Fran\u00e7ois Triozon' title='francois_t' height=\"300\" width=\"210\"  itemprop=\"thumbnailUrl\" srcset=\"https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/francois_t.jpg 210w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/francois_t-26x37.jpg 26w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/francois_t-39x55.jpg 39w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/francois_t-34x48.jpg 34w\" sizes=\"(max-width: 210px) 100vw, 210px\" \/><\/div><\/div><\/div><\/div><div class=\"flex_column av_three_fourth  flex_column_div av-zero-column-padding   \" style='border-radius:0px; '><section class=\"av_textblock_section \"  itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/CreativeWork\" ><div class='avia_textblock  '   itemprop=\"text\" ><h1>Transport at the Nanoscale for CMOS and RRAM Applications<\/h1>\n<h3>Abstract:<\/h3>\n<p>Accurate simulation of electron transport at the nanoscale becomes crucial for advanced CMOS devices and RRAM technologies. In this talk, we review recent progress in quantum transport simulation and their benefits for device optimization. 3D simulations based on the Non-Equilibrium Green\u2019s Functions (NEGF) formalism allow accurate evaluation of access resistances in tri-gate CMOS devices. Similar methods are currently used to evaluate contact resistances in transistors with channels made of 2D materials. We will also discuss some simulation challenges for RRAM devices (OxRAM, tunnel junctions), since the coupling between ab initio simulations and quantum transport does not yet provide a complete picture of device operation.<\/p>\n<h3>Speaker:<\/h3>\n<p><strong>Fran\u00e7ois Triozon, Research Scientist<\/strong><br \/>\n<strong>CEA-Leti, Grenoble, France<\/strong><\/p>\n<p>Fran\u00e7ois TRIOZON received the Ph.D. degree from University Grenoble Alpes, France, in 2002. Since 2005 he is a permanent researcher at CEA-Leti, Grenoble, France. His main research interest is the simulation of electron transport in nanodevices, using both semi-classical and quantum methods, from atomic scale (ab initio) to full device simulations. His research covers various devices and materials: carbon nanotubes, 2D materials, CMOS silicon devices, GaN power devices, ferroelectrics, and OxRAMs.<\/p>\n<\/div><\/section><\/div>\n\n<\/div><\/div><\/div><!-- close content main div --><\/div><\/div><div id='tu_wien'  class='avia-section main_color avia-section-default avia-no-border-styling  avia-bg-style-scroll  mfp-hide  container_wrap fullsize' style=' '  ><div class='container' ><div class='template-page content  av-content-full alpha units'><div class='post-entry post-entry-type-page post-entry-51684'><div class='entry-content-wrapper clearfix'>\n<div class=\"flex_column av_one_fourth  flex_column_div av-zero-column-padding first  \" style='border-radius:0px; '><div  class='avia-image-container  av-styling-    avia-align-center '  itemprop=\"image\" itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/ImageObject\"  ><div class='avia-image-container-inner'><div class='avia-image-overlay-wrap'><img decoding=\"async\" class='wp-image-51423 avia-img-lazy-loading-not-51423 avia_image' src=\"https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/nils_petter_j.jpg\" alt='Nils Petter J\u00f8rstad' title='nils_petter_j' height=\"300\" width=\"210\"  itemprop=\"thumbnailUrl\" srcset=\"https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/nils_petter_j.jpg 210w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/nils_petter_j-26x37.jpg 26w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/nils_petter_j-39x55.jpg 39w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/nils_petter_j-34x48.jpg 34w\" sizes=\"(max-width: 210px) 100vw, 210px\" \/><\/div><\/div><\/div><\/div><div class=\"flex_column av_three_fourth  flex_column_div av-zero-column-padding   \" style='border-radius:0px; '><section class=\"av_textblock_section \"  itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/CreativeWork\" ><div class='avia_textblock  '   itemprop=\"text\" ><h1>Numerical Simulations of Spintronic Magnetoresistive Memories<\/h1>\n<h3>Abstract:<\/h3>\n<p>Magnetoresistive random access memory (MRAM) is a promising candidate for replacing the current charge-based memory technologies due to its high speed, endurance, and nonvolatility. Several approaches have been proposed for efficient manipulation of the logical state by taking advantage of spin-polarized currents. The demand for flexible simulation software capable of simulating the operation of MRAM is high, as several engineering challenges limit the wide adoption of MRAM. We present recent progress and results from the development of a finite element method approach to simulating the charge, spin, and magnetization dynamics in MRAM cells.<\/p>\n<h3>Speaker:<\/h3>\n<p><strong>Nils Petter J\u00f8rstad<\/strong><br \/>\n<strong>Christian Doppler Laboratory for Nonvolatile Magnetoresisitve Memory and Logic (CDL-NovoMemLog), Institute of Microelectronics, TU Wien<\/strong><\/p>\n<p>Nils Petter J\u00f8rstad was born in Warsaw, Poland, in 1995. He received his Master&#8217;s degree in Physics at the Norwegian University of Science and Technology (NTNU), Norway, in 2021, specializing in computational physics. Nils joined the Christian Doppler Laboratory for Nonvolatile Magnetoresistive Memory and Logic at the Institute for Microelectronics, TU Wien, in 2021, where he is pursuing a PhD degree focusing on the implementation of spin and magnetization dynamics in simulations of nonvolatile magnetoresistive memory devices.<\/p>\n<\/div><\/section><\/div>\n\n<\/div><\/div><\/div><!-- close content main div --><\/div><\/div><div id='raul_c'  class='avia-section main_color avia-section-default avia-no-border-styling  avia-bg-style-scroll  mfp-hide  container_wrap fullsize' style=' '  ><div class='container' ><div class='template-page content  av-content-full alpha units'><div class='post-entry post-entry-type-page post-entry-51684'><div class='entry-content-wrapper clearfix'>\n<div class=\"flex_column av_one_fourth  flex_column_div av-zero-column-padding first  \" style='border-radius:0px; '><div  class='avia-image-container  av-styling-    avia-align-center '  itemprop=\"image\" itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/ImageObject\"  ><div class='avia-image-container-inner'><div class='avia-image-overlay-wrap'><img decoding=\"async\" class='wp-image-38492 avia-img-lazy-loading-not-38492 avia_image' src=\"https:\/\/silvaco.com\/wp-content\/uploads\/2022\/02\/Raul_C-210x300.jpg\" alt='' title='Raul_C' height=\"300\" width=\"210\"  itemprop=\"thumbnailUrl\" srcset=\"https:\/\/silvaco.com\/wp-content\/uploads\/2022\/02\/Raul_C-210x300.jpg 210w, https:\/\/silvaco.com\/wp-content\/uploads\/2022\/02\/Raul_C-26x37.jpg 26w, https:\/\/silvaco.com\/wp-content\/uploads\/2022\/02\/Raul_C-39x55.jpg 39w, https:\/\/silvaco.com\/wp-content\/uploads\/2022\/02\/Raul_C-34x48.jpg 34w, https:\/\/silvaco.com\/wp-content\/uploads\/2022\/02\/Raul_C.jpg 400w\" sizes=\"(max-width: 210px) 100vw, 210px\" \/><\/div><\/div><\/div><\/div><div class=\"flex_column av_three_fourth  flex_column_div av-zero-column-padding   \" style='border-radius:0px; '><section class=\"av_textblock_section \"  itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/CreativeWork\" ><div class='avia_textblock  '   itemprop=\"text\" ><h1 class=\"p1\">Digital Twins for Semiconductor Manufacturing<\/h1>\n<h3 class=\"p1\"><span class=\"s1\">Abstract:<\/span><\/h3>\n<p class=\"p1\"><span class=\"s1\">TCAD models are used to simulate the fabrication and operation of semiconductor devices. TCAD has become essential in the deployment of new semiconductor technology. With increasing accuracy, TCAD models can now be used as &#8220;digital twins&#8221; to simulate and optimize semiconductor manufacturing processes.<\/span><\/p>\n<p class=\"p1\"><span class=\"s1\">This opens up many new applications, such as virtual development of new semiconductor technology, reducing the need for physical experimentation, and ultimately shortening development time and time to yield. Digital twins can also be used during production in the fab to further optimize processes, monitor variations, and detect malfunctions. This presentation will delve into these concepts and provide examples of TCAD that can be used as digital twins.<\/span><\/p>\n<h3>Speaker:<\/h3>\n<p><strong>Ra\u00fal Camposano, Ph.D, Chief Technology Officer<\/strong><br \/>\n<strong> Silvaco, Inc.\u200b<\/strong><\/p>\n<p>Ra\u00fal Camposano, Ph.D., has served as Silvaco\u2019s Chief Technology Officer since February 2022. Dr. Camposano has served as a partner at Silicon Catalyst LLC, an incubator for semiconductor solutions, since April 2015 and as a lecturer on EDA and Machine Learning Hardware at Stanford since April 2018. From July 2020 to January 2022, Dr. Camposano served as an advisor to Applied Materials, Inc., a semiconductor equipment company. From August 2015 to July 2020, Dr. Camposano served as Chief Executive Officer of Sage Design Automation, Ltd., a software tools company acquired by Applied Materials in 2020. From November 2010 to May 2014, Dr. Camposano served as Chief Executive Officer of Nimbic, Inc., an EDA cloud company, acquired by Mentor Graphics Corporation in 2014. From January 1994 to January 2007, Dr. Camposano served in various roles at Synopsys, an EDA solutions company, including as its Chief Technology Officer, Senior Vice President, and General Manager. Prior to that, Dr. Camposano served on the board of directors of the German National Research Center for Computer Science, as a professor of computer science at the University of Paderborn, and as a Research Staff Member at the IBM T.J. Watson Research Center. Dr. Camposano received a B.S. and M.S. in electrical engineering from Universidad de Chile and a Ph.D. in computer science from Karlsruhe Institute of Technology. Dr. Camposano was elected as a Fellow of the IEEE in 1999 and to serve on the board of directors of ESDA, the EDA Consortium, in 2012.<\/p>\n<\/div><\/section><\/div>\n\n<\/div><\/div><\/div><!-- close content main div --><\/div><\/div><div id='micron'  class='avia-section main_color avia-section-default avia-no-border-styling  avia-bg-style-scroll  mfp-hide  container_wrap fullsize' style=' '  ><div class='container' ><div class='template-page content  av-content-full alpha units'><div class='post-entry post-entry-type-page post-entry-51684'><div class='entry-content-wrapper clearfix'>\n<div class=\"flex_column av_one_fourth  flex_column_div av-zero-column-padding first  \" style='border-radius:0px; '><div  class='avia-image-container  av-styling-    avia-align-center '  itemprop=\"image\" itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/ImageObject\"  ><div class='avia-image-container-inner'><div class='avia-image-overlay-wrap'><img decoding=\"async\" class='wp-image-0 avia-img-lazy-loading-not-0 avia_image' src=\"https:\/\/silvaco.com\/wp-content\/themes\/enfold\/config-templatebuilder\/avia-template-builder\/images\/placeholder.jpg\" alt='' title=''   itemprop=\"thumbnailUrl\"  \/><\/div><\/div><\/div><\/div><div class=\"flex_column av_three_fourth  flex_column_div av-zero-column-padding   \" style='border-radius:0px; '><section class=\"av_textblock_section \"  itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/CreativeWork\" ><div class='avia_textblock  '   itemprop=\"text\" ><h1 class=\"p1\"><span class=\"s1\">Advanced Modeling Solutions for Development and Manufacturing of Memory Technologies<\/span><\/h1>\n<p>text<\/p>\n<\/div><\/section><\/div>\n\n<\/div><\/div><\/div><!-- close content main div --><\/div><\/div><div id='purdue'  class='avia-section main_color avia-section-default avia-no-border-styling  avia-bg-style-scroll  mfp-hide  container_wrap fullsize' style=' '  ><div class='container' ><div class='template-page content  av-content-full alpha units'><div class='post-entry post-entry-type-page post-entry-51684'><div class='entry-content-wrapper clearfix'>\n<div class=\"flex_column av_one_fourth  flex_column_div av-zero-column-padding first  \" style='border-radius:0px; '><div  class='avia-image-container  av-styling-    avia-align-center '  itemprop=\"image\" itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/ImageObject\"  ><div class='avia-image-container-inner'><div class='avia-image-overlay-wrap'><img decoding=\"async\" class='wp-image-51662 avia-img-lazy-loading-not-51662 avia_image' src=\"https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/gerhard_k.jpg\" alt='Gerhard Klimeck' title='gerhard_k' height=\"300\" width=\"210\"  itemprop=\"thumbnailUrl\" srcset=\"https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/gerhard_k.jpg 210w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/gerhard_k-26x37.jpg 26w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/gerhard_k-39x55.jpg 39w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/gerhard_k-34x48.jpg 34w\" sizes=\"(max-width: 210px) 100vw, 210px\" \/><\/div><\/div><\/div><\/div><div class=\"flex_column av_three_fourth  flex_column_div av-zero-column-padding   \" style='border-radius:0px; '><section class=\"av_textblock_section \"  itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/CreativeWork\" ><div class='avia_textblock  '   itemprop=\"text\" ><h1>25 Years of Quantum Transport Tool Development Resulting in a Global Impact<\/h1>\n<h3>Abstract:<\/h3>\n<p>The quantum transport modeling community has debated the virtues of various theoretical approaches and prototype implementations over the past 30 years. Early 1980\/90s prototypical devices were based on 2-D electron gases (2DEGs) or room-temperature resonant tunneling diodes. We have come full term and find the critical size and operational characteristics of these early devices in today\u2019s nano-scaled transistors. Today industry requires quantitative, predictive device design models to explore the design paths towards devices at the ultimate few nanometer scaling limit. This presentation will describe the critical reasons why industry has adopted the Non-Equilibrium Green Function (NEGF) methodology with an atomistic tight-binding basis. Our NEMO5 implementation defined the state-of-the-art that is now adopted by the community, is used today at Intel and commercialized by Silvaco. nanoHUB and chipshub disseminate various NEMO versions through simple-to-use apps such that students and researchers can explore concepts and performed detailed analysis.<\/p>\n<h3>Speaker:<\/h3>\n<p><strong>Gerhard Klimeck, Professor and nanoHUB Director<\/strong><br \/>\n<strong>Purdue University<\/strong><\/p>\n<p>Dr. Gerhard Klimeck is a Chaired Professor of Electrical and Computer Engineering at Purdue University; Deputy CIO and Associate Vice President for Academic IT; Director of the Network for Computational Nanotechnology; Reilly Director of the Center for Predictive Materials and Devices. He helped to create nanoHUB.org, the largest virtual nanotechnology user facility serving over 2.0 million global users, annually. Dr. Klimeck is a fellow of the Institute of Physics (IOP), the American Physical Society (APS), the Institute of Electrical and Electronics Engineers (IEEE), the American Association for the Advancement of Science (AAAS), and the German Humboldt Foundation. He has published over 525 printed scientific articles; he has been recognized for his co-invention of a single-atom transistor, quantum mechanical modeling theory, and simulation tools. His NEMO5 software has been used since 2015 at Intel to design nano-scaled design transistors. The nanoHUB team was recently recognized by a top 100 by R&amp;D award &#8211; Making simulation and data pervasive.<\/p>\n<\/div><\/section><\/div>\n\n<\/div><\/div><\/div><!-- close content main div --><\/div><\/div><div id='phillipe_b'  class='avia-section main_color avia-section-default avia-no-border-styling  avia-bg-style-scroll  mfp-hide  container_wrap fullsize' style=' '  ><div class='container' ><div class='template-page content  av-content-full alpha units'><div class='post-entry post-entry-type-page post-entry-51684'><div class='entry-content-wrapper clearfix'>\n<div class=\"flex_column av_one_fourth  flex_column_div av-zero-column-padding first  \" style='border-radius:0px; '><div  class='avia-image-container  av-styling-    avia-align-center '  itemprop=\"image\" itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/ImageObject\"  ><div class='avia-image-container-inner'><div class='avia-image-overlay-wrap'><img decoding=\"async\" class='wp-image-42609 avia-img-lazy-loading-not-42609 avia_image' src=\"https:\/\/silvaco.com\/wp-content\/uploads\/2022\/08\/Philippe-Blaise-270x300.jpg\" alt='Philippe Blaise' title='Philippe Blaise' height=\"300\" width=\"270\"  itemprop=\"thumbnailUrl\" srcset=\"https:\/\/silvaco.com\/wp-content\/uploads\/2022\/08\/Philippe-Blaise-270x300.jpg 270w, https:\/\/silvaco.com\/wp-content\/uploads\/2022\/08\/Philippe-Blaise-33x37.jpg 33w, https:\/\/silvaco.com\/wp-content\/uploads\/2022\/08\/Philippe-Blaise-49x55.jpg 49w, https:\/\/silvaco.com\/wp-content\/uploads\/2022\/08\/Philippe-Blaise-43x48.jpg 43w, https:\/\/silvaco.com\/wp-content\/uploads\/2022\/08\/Philippe-Blaise.jpg 277w\" sizes=\"(max-width: 270px) 100vw, 270px\" \/><\/div><\/div><\/div><\/div><div class=\"flex_column av_three_fourth  flex_column_div av-zero-column-padding   \" style='border-radius:0px; '><section class=\"av_textblock_section \"  itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/CreativeWork\" ><div class='avia_textblock  '   itemprop=\"text\" ><h1>Simulation of 2D-TMDs-channel FETs with Atomistic Precision<\/h1>\n<h3>Abstract:<\/h3>\n<p>Are the 2D-channel transistors suitable candidates for the replacement of Si? Taking into account the extreme scaling down to a few atomic layers of the FET channel, only an atomistic solution looks viable. In this context, we show how the Victory Atomistic tool can answer this essential question thanks to quantum mechanics, offering valuable support for the prototyping effort of a 2D transistor in a professional TCAD environment.<\/p>\n<h3>Speaker:<\/h3>\n<p><strong>Dr. Philippe Blaise, Senior Application Engineer<\/strong><br \/>\n<strong>Silvaco, Inc.<\/strong><\/p>\n<p>Dr. Philippe Blaise has been a senior application engineer in atomistic simulation at Silvaco\u2019s TCAD Division for three years. Prior to joining Silvaco, Dr. Blaise was a senior engineer specialized in atomistic simulation of new memory devices and transistors at CEA\/LETI for 15 years. He is a former member of the IEEE IEDM Modelling and Simulation Committee. He is co-author of more than 50 papers in peer-review journals in the field and 30 contributions to conferences and workshops, plus 5 patents and one book chapter.<\/p>\n<p>Dr. Blaise holds a Master\u2019s degree in applied mathematics from ENSIMAG engineering school and a Ph.D. in solid states physics from the Universit\u00e9 Grenoble Alpes, France.<\/p>\n<\/div><\/section><\/div>\n\n<\/div><\/div><\/div><!-- close content main div --><\/div><\/div><div id='dan_f'  class='avia-section main_color avia-section-default avia-no-border-styling  avia-bg-style-scroll  mfp-hide  container_wrap fullsize' style=' '  ><div class='container' ><div class='template-page content  av-content-full alpha units'><div class='post-entry post-entry-type-page post-entry-51684'><div class='entry-content-wrapper clearfix'>\n<div class=\"flex_column av_one_fourth  flex_column_div av-zero-column-padding first  \" style='border-radius:0px; '><div  class='avia-image-container  av-styling-    avia-align-center '  itemprop=\"image\" itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/ImageObject\"  ><div class='avia-image-container-inner'><div class='avia-image-overlay-wrap'><img decoding=\"async\" class='wp-image-47788 avia-img-lazy-loading-not-47788 avia_image' src=\"https:\/\/silvaco.com\/wp-content\/uploads\/2023\/03\/dan_f_headshot-210x300.png\" alt='' title='dan_f_headshot' height=\"300\" width=\"210\"  itemprop=\"thumbnailUrl\" srcset=\"https:\/\/silvaco.com\/wp-content\/uploads\/2023\/03\/dan_f_headshot-210x300.png 210w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/03\/dan_f_headshot-26x37.png 26w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/03\/dan_f_headshot-39x55.png 39w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/03\/dan_f_headshot-34x48.png 34w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/03\/dan_f_headshot.png 400w\" sizes=\"(max-width: 210px) 100vw, 210px\" \/><\/div><\/div><\/div><\/div><div class=\"flex_column av_three_fourth  flex_column_div av-zero-column-padding   \" style='border-radius:0px; '><section class=\"av_textblock_section \"  itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/CreativeWork\" ><div class='avia_textblock  '   itemprop=\"text\" ><h1 class=\"p1\">Analog Custom Design Update<\/h1>\n<h3>Abstract:<\/h3>\n<p><span class=\"s1\">Dan FitzPatrick <\/span> will provide an update on Silvaco\u2019s Analog Custom Design product portfolio, new features and functionality, and the future of Silvaco\u2019s EDA solutions.<\/p>\n<h3>Speaker:<\/h3>\n<p class=\"p1\"><strong>Dan Fitzpatrick, VP and GM of EDA Business Unit<br \/>\nSilvaco, Inc\u200b\u200b\u200b<\/strong><\/p>\n<p class=\"p1\">Dan FitzPatrick is Vice President and General Manager of the EDA Business Unit. He is responsible for managing the development of all EDA tools including analog custom design and verification, circuit simulation and SPICE modeling, standard cell layout generation and characterization and SIP management tools. Dan joined Silvaco in 2021, leading SIP management, standard cell layout generation and characterization product lines. Dan has an extensive EDA background and many years of experience in software development and product management from startups to fortune 500 companies. Dan holds a MSEE from the University of Florida and an MBA from the University of Central Florida.<\/p>\n<\/div><\/section><\/div>\n\n<\/div><\/div><\/div><!-- close content main div --><\/div><\/div><div id='aril'  class='avia-section main_color avia-section-default avia-no-border-styling  avia-bg-style-scroll  mfp-hide  container_wrap fullsize' style=' '  ><div class='container' ><div class='template-page content  av-content-full alpha units'><div class='post-entry post-entry-type-page post-entry-51684'><div class='entry-content-wrapper clearfix'>\n<div class=\"flex_column av_one_fourth  flex_column_div av-zero-column-padding first  \" style='border-radius:0px; '><div  class='avia-image-container  av-styling-    avia-align-center '  itemprop=\"image\" itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/ImageObject\"  ><div class='avia-image-container-inner'><div class='avia-image-overlay-wrap'><img decoding=\"async\" class='wp-image-51427 avia-img-lazy-loading-not-51427 avia_image' src=\"https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/sinan_doluca.jpg\" alt='' title='sinan_doluca' height=\"300\" width=\"210\"  itemprop=\"thumbnailUrl\" srcset=\"https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/sinan_doluca.jpg 210w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/sinan_doluca-26x37.jpg 26w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/sinan_doluca-39x55.jpg 39w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/sinan_doluca-34x48.jpg 34w\" sizes=\"(max-width: 210px) 100vw, 210px\" \/><\/div><\/div><\/div><\/div><div class=\"flex_column av_three_fourth  flex_column_div av-zero-column-padding   \" style='border-radius:0px; '><section class=\"av_textblock_section \"  itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/CreativeWork\" ><div class='avia_textblock  '   itemprop=\"text\" ><h1>High Speed, Reliable, Low Voltage SRAM for Efficient Compute<\/h1>\n<h3>Abstract:<\/h3>\n<p>Efficiency is critical for next generation systems whether they are battery operated devices or AI\/ML accelerators in the cloud infrastructure. Operating the logic and SRAM technology at the same voltage and leveraging dynamic voltage and frequency scaling can deliver maximum performance and efficiency but is often limited by voltage capability, speed and reliability of the SRAM macros.<\/p>\n<p>A new SRAM technology, optimized on state-of-the-art CMOS technology, targets high speed, robust\/reliable operation over a wide voltage range from 0.45V to 0.8V and above. The high speed, low voltage SRAM technology can be combined with efficient microarchitecture and optimized physical design to maximize performance per watt for compute, graphics, or AI\/ML engines.<\/p>\n<h3>Speaker:<\/h3>\n<p><strong>Sinan Doluca<\/strong><br \/>\n<strong>VP of Technology, Aril, Inc.<\/strong><\/p>\n<\/div><\/section><\/div>\n\n<\/div><\/div><\/div><!-- close content main div --><\/div><\/div><div id='ahmad_shaikh'  class='avia-section main_color avia-section-default avia-no-border-styling  avia-bg-style-scroll  mfp-hide  container_wrap fullsize' style=' '  ><div class='container' ><div class='template-page content  av-content-full alpha units'><div class='post-entry post-entry-type-page post-entry-51684'><div class='entry-content-wrapper clearfix'>\n<div class=\"flex_column av_one_fourth  flex_column_div av-zero-column-padding first  \" style='border-radius:0px; '><p><div  class='avia-image-container  av-styling-    avia-align-center '  itemprop=\"image\" itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/ImageObject\"  ><div class='avia-image-container-inner'><div class='avia-image-overlay-wrap'><img decoding=\"async\" class='wp-image-51435 avia-img-lazy-loading-not-51435 avia_image' src=\"https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/ahmad_m_new.jpg\" alt='' title='ahmad_m_new' height=\"300\" width=\"210\"  itemprop=\"thumbnailUrl\" srcset=\"https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/ahmad_m_new.jpg 210w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/ahmad_m_new-26x37.jpg 26w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/ahmad_m_new-39x55.jpg 39w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/ahmad_m_new-34x48.jpg 34w\" sizes=\"(max-width: 210px) 100vw, 210px\" \/><\/div><\/div><\/div><br \/>\n<div  class='avia-image-container  av-styling-    avia-align-center '  itemprop=\"image\" itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/ImageObject\"  ><div class='avia-image-container-inner'><div class='avia-image-overlay-wrap'><img decoding=\"async\" class='wp-image-51431 avia-img-lazy-loading-not-51431 avia_image' src=\"https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/shaikh_s.jpg\" alt='' title='shaikh_s' height=\"300\" width=\"210\"  itemprop=\"thumbnailUrl\" srcset=\"https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/shaikh_s.jpg 210w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/shaikh_s-26x37.jpg 26w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/shaikh_s-39x55.jpg 39w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/09\/shaikh_s-34x48.jpg 34w\" sizes=\"(max-width: 210px) 100vw, 210px\" \/><\/div><\/div><\/div><\/p><\/div><div class=\"flex_column av_three_fourth  flex_column_div av-zero-column-padding   \" style='border-radius:0px; '><section class=\"av_textblock_section \"  itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/CreativeWork\" ><div class='avia_textblock  '   itemprop=\"text\" ><h1>Designing High Performance I\/O for Cryogenic Applications<\/h1>\n<h3>Abstract:<\/h3>\n<p>The Silvaco Analog and Interface IP team recently designed and delivered a very high speed 2Gbs fully functional LVDS I\/O operating at 4K (-269C). The Silvaco modeling team created model files at this extreme temperature and the IP team designed, laid out and created collaterals\/views with Silvaco EDA tools. The devices\u2019 characteristics do not follow regular characteristics seen at standard temperatures (-55C to 125C) and making it functional at 4K is by no means an easy challenge.<\/p>\n<p>The LVDS PHY included transmitter, receiver and an accessory block satisfying PVT independent performance which included 3.5mA current drive by the transmitter @100-ohm load and PVT independent 100 ohm terminated between the PAD+ and PAD- terminals of the Receiver. Furthermore, the Transistor also included programmable equalization to provide board, SI (Signal Integrity) and PI (Power Integrity) compliant performance.<\/p>\n<h3>Speakers:<\/h3>\n<p><strong>Ahmad S. Mazumder, Director of Engineering<\/strong><br \/>\n<strong>Silvaco, Inc.<\/strong><\/p>\n<p>Ahmad S Mazumder is a Director of Engineering in the IP Division of Silvaco. He is responsible for Development &amp; Customer support in all Analog and Interface IPs. He is an Industry veteran on the development of High-Speed Memory &amp; Interface IPs and all sorts of analog IPs. He worked on cutting edge DDR, extreme High-speed SerDes, Interfaces, ESD, Quality &amp; Reliability for 28 years at various SOC companies \u2013 Intel, Broadcom, C-Cube Microsystems etc. He joined Silvaco\u2019s IP Engineering Division in 2019 and is Instrumental in growing Analog\/IP business at an accelerated rate.<br \/>\nAhmad S Mazumder holds an MS in VLSI Semiconductor Design from the City University of New York and BS in Electrical &amp; Electronics Engineering from Bangladesh University of Engineering and Technology.<\/p>\n<p><strong>Shaikh A Shams, Staff Engineer<\/strong><br \/>\n<strong>Silvaco, Inc.<\/strong><\/p>\n<p>Shaikh A Shams is a Staff Engineer in the Analog\/Interface IP Division of Silvaco. He is responsible for developing Analog and Interface IPs at Silvaco. He worked on High-speed SerDes, Interfaces, Voltage Regulators, AMS Design and Verification for 22 years at different companies \u2013 Intel Corporation, Global Foundries and Dialog Semiconductor. He joined Silvaco\u2019s IP Engineering Division in 2020. Shaikh A Shams holds an MS in Electrical and Computer Engineering from the University of Arizona.<\/p>\n<\/div><\/section><\/div>\n\n<\/div><\/div><\/div><!-- close content main div --><\/div><\/div><div id='ayoub_h'  class='avia-section main_color avia-section-default avia-no-border-styling  avia-bg-style-scroll  mfp-hide  container_wrap fullsize' style=' '  ><div class='container' ><div class='template-page content  av-content-full alpha units'><div class='post-entry post-entry-type-page post-entry-51684'><div class='entry-content-wrapper clearfix'>\n<div class=\"flex_column av_one_fourth  flex_column_div av-zero-column-padding first  \" style='border-radius:0px; '><div  class='avia-image-container  av-styling-    avia-align-center '  itemprop=\"image\" itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/ImageObject\"  ><div class='avia-image-container-inner'><div class='avia-image-overlay-wrap'><img decoding=\"async\" class='wp-image-51903 avia-img-lazy-loading-not-51903 avia_image' src=\"https:\/\/silvaco.com\/wp-content\/uploads\/2023\/10\/ayoub_h.jpg\" alt='Ayoub HAGROU' title='ayoub_h' height=\"300\" width=\"210\"  itemprop=\"thumbnailUrl\" srcset=\"https:\/\/silvaco.com\/wp-content\/uploads\/2023\/10\/ayoub_h.jpg 210w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/10\/ayoub_h-26x37.jpg 26w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/10\/ayoub_h-39x55.jpg 39w, https:\/\/silvaco.com\/wp-content\/uploads\/2023\/10\/ayoub_h-34x48.jpg 34w\" sizes=\"(max-width: 210px) 100vw, 210px\" \/><\/div><\/div><\/div><\/div><div class=\"flex_column av_three_fourth  flex_column_div av-zero-column-padding   \" style='border-radius:0px; '><section class=\"av_textblock_section \"  itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/CreativeWork\" ><div class='avia_textblock  '   itemprop=\"text\" ><h1>Advanced Parasitics Analysis Demonstration with Viso<\/h1>\n<h3>Abstract:<\/h3>\n<p>Viso is a next generation parasitics analysis solution that quickly analyzes the electrical properties of RC parasitic networks, which can crucially impact circuit behavior. Viso\u2019s parasitics-focused approach enables fast analysis of interconnects to pinpoint problem areas. Viso provides a highly intuitive user interface to highlight problematic parasitics, timing estimation and accurate comparison of different extracted netlists.<\/p>\n<p>In this session we will demonstrate the power and capabilities of Viso in a real-world circuit design.<\/p>\n<h3>Speaker:<\/h3>\n<p><strong>Ayoub Hagrou, Analog Design Engineer<\/strong><br \/>\n<strong>STMicroelectronics<\/strong><\/p>\n<p>Ayoub Hagrou works as Analog Design Engineer for STM32 General Purpose Microcontroller Products in the MDG division of STMicroelectronics.<\/p>\n<\/div><\/section><\/div>\n\n","protected":false},"excerpt":{"rendered":"","protected":false},"author":8,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"categories":[],"tags":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO Premium plugin v24.0 (Yoast SEO v24.0) - https:\/\/yoast.com\/wordpress\/plugins\/seo\/ -->\n<title>SURGE Virtual Event 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