Unraveling and Optimizing Transistor-Level Simulation
Circuit Simulation is one of the most critical parts of the design process. Validating circuit behavior is essential to saving cost, minimize turn-around times and establishing reliable system characteristics before IC manufacture. To maximize throughput and efficiency, it is necessary to understand the internal methodologies and processes happening inside SPICE simulations. In this webinar, we will be presenting an in-depth understanding of the core of the SmartSpice simulator, including parallel and FastSPICE analysis modes.
After the webinar, attendees will be able to optimize the performance of SmartSpice and SmartSpice Pro in accordance with their design applications and methodology to achieve the ideal balance of Accuracy-of-analysis versus Speed-of-analysis.
What attendees will learn:
- Simulation Process and Framework
- Numerical Integration
- Timestep Control
- FastSPICE Simulation Technology
- Trading off Accuracy versus Speed