• Variation & Yield Analysis

Variation-Aware Design

Process variability at advanced technology nodes has become a key challenge for IC designers. A new generation of tools are required that provide efficient and reliable solutions for analog, RF, standard cells, IO and memory designers beyond traditional Monte Carlo analysis. A comprehensive suite of new tools that allow the designer to accurately address statistical process variations and to make the right design decision upfront is needed. The VarMan tool suite ensures that designers do not need to be expert statisticians to understand and optimize the impact of process variations on their design.

Traditional Monte Carlo simulation is too slow for nanometer variation analysis, particularly with tight design schedules. VarMan is a breakthrough technology delivering up to 30X simulation performance compared to traditional Monte Carlo simulation, while guaranteeing the same level of accuracy. Its high sigma analysis capabilities provide very fast and highly accurate yield estimation and the ability to quickly identify sample fails and design weakness.

Our full-chip memory yield analysis uses VarMan’s innovative fast Monte Carlo and robust high-sigma kernels for a fast fail detection and yield estimation of an entire memory.

Variation & Yield Analysis Resources

Standard Cell Statistical Characterization with VarMan

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Customers

Frédéric Masson
 This is the solution we were impatiently awaiting. Simulating a whole memory and analyzing accurately and quickly its yield has been a lastingly longed-for feature. 
Emmanuel Sabonnadiere
 Setting up advanced methods is essential with emerging technologies developed by CEA-Leti and the increase of memories’ needs. If a new method allows characterizing memory designs more quickly at a given condition of use, the entire characterization process that covers all conditions is accelerated