• 技术刊物 Simulation Standard

Simulation Standard

Silvaco面向半导体工艺和器件仿真工程师推出的技术刊物

Hints, Tips, and Solutions April 2000

Q. How can I extract VBIC bipolar model parameters using UTMOST III? A. UTMOST III Bipolar module can be utilized to extract and optimize the VBIC model parameters for bipolar devices.

NEW RF MOSFET Small Signal SPICE Model

With the advent of ever increasing operation frequencies, Silvaco is introducing a new high frequency model for MOSFETs that will be implemented into the SmartSpice code. This article describing these new models will be in two parts.

JFET/MESFET TRIQUINT Models (Level=5 and level=7)

Until now, SmartSpice has supported the TriQuint model designated TOM using the Level=5 model parameter. SmartSpice now supports the TriQuint-2 MESFET model designated TOM-2. This model is accessible as a standard MESFET model, using the Level=7 model parameter. It is an incremental improvement based on TriQuint?s original MESFET model. All current analyses are currently supported (dc, ac, transient and noise).

New Version 5.0 of UFSOI Model Released in SmartSpice

The University of Florida SOI Group first released version 5.0 of UFSOI model in August 1999 and then in November 1999. To keep backward compatibility with previous versions, two model parameters (VERSION, REVISION) have been added in SmartSpice to select the desired model. By default, the value of VERSION is 5.0 and the value of REVISION is 1.0 which corresponds to the last release of November, 1999.

Hints, Tips, and Solutions March 2000

Q: Usually, when I want to change the display of a drawing in the Drawing window, I select the Window pull-down menu in order to zoom in/out, pan, and fit. Sometimes, if I need to do these operations, this way is not convenient. What is a more effective way to control displaying?

Scholar – SmartSpice Interface

One of the most useful features of the Scholar schematic capture is tight integration with the SmartSpice simulator. In effect, Scholar makes it possible to automatically generate SmartSpice netlist on the basis of the schematic. Such a possibility covers both analog and digital designs.