Simulation Standard
Silvaco面向半导体工艺和器件仿真工程师推出的技术刊物
QUEST: Frequency-Dependent RLCG Extractor Part 2 – Comparison with Experiments
This article presents a standard case of transmission line: the microstrip structure. First, the structure is described and then the results extracted from QUEST are compared with measurements. We thank STMicroelectronics (Crolles-R&D) for experimental data support.
ATLAS Simulation of a Schottky Contact
ATLAS allows the user to define a contact with a number of different boundary conditions; ohmic, Schottky, current controlled, floating or reflecting. The Schottky contact boundary condition realizes that at the metal semiconductor interface a barrier exists due to the presence of interface states.
Verilog-A Release in SmartSpice
We give in this article an introduction to the Verilog-A SmartSpice interface. This new feature in SmartSpice allows the user to write their own physical models in the Verilog-A language. The first section of the paper gives a brief overview of the Verilog-A language. The second presents the ease of use of simulating transistor models as well as digital circuits with the new Verilog-A SmartSpice interface.
New Ferroelectric Capacitance Model frmc from Ramtron Corporation in SmartSpice
Ramtron International Corporation has developed a ferroelectric capacitance model with a new concept of double distributions of domain reversal voltages.
Multiple Linear Solvers Introduced in SmartSpice
Acknowledging the need for more flexibility, SmartSpice now provides three numerical methods for linear system solution. The additional solvers provide for greater capacity by minimizing memory requirements and reducing the overall simulation time.
BSIM4 RF CMOS Modeling with UTMOST III
The BSIM4 model provides a RF CMOS modeling capability. Prior to the BSIM4 model the RF modeling was accomplished by using macro models. The macro models were complex, contained many external elements and exhibited poor geometry scaling.