Silvaco提供丰富的经量产验证的AMBA总线IP核模块和子系统IP。
| Protocol | IP核名称 | 功能特性 |
|---|---|---|
| AXI | AXI QSPI Controller | AXI-4, XIP support, DMA, Quad/Dual mode, Full/half duplex operation |
| AXI / SPI Slave Bridge | Read/write access to AXI subsystem registers and memories | |
| AXI 5-Master SRAM Controller | Low Latency with zero or one cycle access to 64-bit SRAM | |
| AHB | AHB Quad SPI Controller | AHB, 4/8/32-bit operation, Full/half duplex, Dual/Quad modes, XIP and PSRAM support |
| AHB Octal SPI Controller | AHB, 4/8/32-bit operation, Full/half duplex, Dual/Quad/Octal modes, XIP and PSRAM support | |
| AHB Arbiter | AHB 2.0, Up to 4 controllers using round-robin mechanism | |
| AHB DES / Triple DES | AHB 2.0, AHB DES/TDES mode, DMA controller, Elliptical curve | |
| AHB AES with DMA | ECB/CBC/OFB, 128/192/256-bit key lengths | |
| AHB Single/Quad DMA Controller | AHB 2.0, 1/4-channel, Single/programmable burst, Linked-list support | |
| SPI to AHB-Lite Bridge | Read/write access to AHB-Lite sub-system | |
| AHB-Lite Slave to SPI Master | Supports 4 slaves and all SPI modes | |
| AHB External Bus Interface | Supports 8-bit, 16-bit, 32-bit access | |
| AHB TFT LCD Controller | Supports 24-bit, 16-bit, 8-bit color LCD panels | |
| AHB SRAM Controller | AHB-Lite, Zero wait state 8-bit, 16-bit, 32-bit access to SRAM | |
| AHB Parallel Flash Controller | AHB bus to Parallel SuperFlash device supports 8/16/32-bit external modes, 8/16/32-bit AHB access | |
| APB | APB GPIO | APB 2.0, Scalable up to 32 I/Os, Interrupt support, Software configurable |
| APB Real Time Clock | APB 2.0, Clock/calendar BCD format with interrupt support | |
| APB Interrupt Controller | APB 2.0, Up to 32 independent channels | |
| APB Pulse Width Modulator | APB 2.0, Prescaler/non-prescaler mode, 4-bit prescaler | |
| APB Timer | APB 2.0, 32-bit counter/timer, 10-bit prescaler, RTOS time base | |
| APB UART | APB 2.0, programmable baud rates, DMA interface, interrupt support | |
| APB Windowed Watchdog Timer | APB 2.0, 32-bit counter/timer, 12-bit prescaler, interrupt support, DFT support, windowing | |
| AMBA Bus Fabrics / Bridges | AHB Multi Fabric | AHB-Lite, Support up to 8 masters and 12 slaves |
| AXI Multi Fabric | AXI 4, Support up to 4 controllers and 8 targets | |
| AXI / AHB Bridge | AXI 4, AHB Lite, 2-clock domains with FIFO support | |
| AHB / AXI Bridge | AXI 4, AHB Lite, 2-clock domains with FIFO support | |
| AHB / APB Bridge | APB 3.0, 2.0, Low latency, Low gate count | |
| AHB Bus Channel + Decoder | AHB-Lite, supports up to 16 slaves | |
| APB Bus Channel + Decoder | APB 3.0, 2.0, supports up to 16 slaves | |
| AHB-Lite to AHB-Lite Asynchronous Bridge | Bridge asynchronous AHB-Lite domains for any clock freq. ratio | |
| APB to AHB-Lite Asynchronous Bridge | Bridge asynchronous APB and AHB-Lite domains for any clock freq. ratio | |
| AXI / APB Bridge | AXI 4 Lite, APB 2.0, APB 3.0 | |
| AMBA Subsystems | AHB Low-power | AHB 2.0, APB 3.0, Power management, Boot code, Basic kernel support |
| AHB Performance ARM-M0 / ARM-M3 | AHB 2.0, APB 3.0, PMU, RTOS/Kernel support, DMA | |
| AHB Secure M3 | AHB 2.0, APB 3.0, Secure AHB Fabric, SRAM and ROM Parameterized MPUs, PMU, RTOS/Kernel support, DMA | |
| AXI Performance | AXI 4, AHB-Lite, APB 2.0 multi-layer fabric, QSPI RTOS/Linux support |
Learn How SilTerra Uses Cello and Viola for Standard Cells and I/O Library Optimization and Characterization
Learn About Silvaco’s AMBA AHB Subsystems and How to Customize, Secure, and Verify
Designing with Silvaco’s Octal SPI Memory Controller with Advanced Memory Support for IoT Systems
Achieving Extreme Low Power IoT Designs with Silvaco’s 55LPx Foundation IP Solution
Development & Delivery of Complete IO & ESD Library in 5 Weeks