In this webinar, we describe how SmartSpice HPP takes advantage of the modern multicore hardware platforms to speed up all internal aspects of transient simulations of analog circuits by adopting a partition-based simulation.
/wp-content/uploads/2019/11/silvaco-logo.png00Erick Castellon/wp-content/uploads/2019/11/silvaco-logo.pngErick Castellon2020-10-26 11:12:082021-09-22 13:47:26Simulate 40X Faster with SmartSpice HPP
June 11, 2020 | 10:00 am – 10:30 am (PDT)
This webinar will provide a guide to developing Compact Models in SmartSpice to achieve optimal simulation performance. You will learn how models are used in SmartSpice and best practices when constructing a custom Verilog-A model.
/wp-content/uploads/2019/11/silvaco-logo.png00Ingrid Schwarz/wp-content/uploads/2019/11/silvaco-logo.pngIngrid Schwarz2014-02-27 16:09:592021-10-13 10:21:13TCAD to SPICE simulation of SiC and Si Power Devices
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