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How Silvaco TCAD is at the Heart of Innovation in RF Devices

At high frequency, the accurate modelling of parasitic elements is crucial to IC design. Substrate behavior is a significant contributor to such parasitics, and its modelling is a challenge, not only under small-signal conditions due to strongly non-uniform resistivity profiles in semiconductor materials, but especially under large-amplitude excitations.

In this work, Silvaco’s TCAD Victory Device simulation tool is used to model both small- and large-signal behavior of various types of silicon-based substrates. The developed models are heavily based in material semiconductor physics, and the physical charge-balance interplay is rigorously studied, shedding light on the inner workings of a wide range of silicon-based substrates under both quasi-static and strong non-equilibrium transient conditions.

In particular, the developed large-signal modelling scheme is demonstrated to be stable, i.e., to converge in both space and time, and to correlate well to a wide set of measurement data from over 20 different silicon-based substrates.

What You Will Learn

  • How to model behavior of various types of silicon-based advanced substrates
  • How to study physical charge-balance interplay
  • Inner workings of silicon-based substrates under both quasi-static and strong non-equilibrium transient conditions
  • Developing large-signal modeling schemes


Jean Pierre Raskin

Jean Pierre Raskin, Professor at Université catholique de Louvain

Jean-Pierre Raskin received the M.S. and Ph.D. degrees in applied sciences from Université catholique de Louvain (UCLouvain), Louvain-la-Neuve, Belgium, in 1994 and 1997, respectively. He has been a Full Professor at the Electrical Engineering Department of UCLouvain since 2000. His research interests are the modeling, wideband characterization and fabrication of advanced SOI MOSFETs as well as micro and nanofabrication of MEMS / NEMS sensors and actuators, including the extraction of intrinsic material properties at nanometer scale. He has been IEEE Fellow since 2014. He was the recipient of the Médaille BLONDEL 2015, the SOI Consortium Award 2016, the European SEMI Award 2017, the Médaille AMPERE 2019, and the Georges Vanderlinden Prize 2020, in recognition in his vision and pioneering work for RF SOI. He is author or co-author of more than 350 scientific journal articles. In 2017, he received with the NGO Louvain Cooperation the European Global Education Innovation Award for the lecture-project IngénieuxSud.


Semiconductor device, IP, Circuit, CAD, SoC and System design engineers, product managers and engineering management.

When: March 17, 2022
Where: Online
Time: 10:00am-10:30am-(PDT)
Language: English