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Improving Memory on the Edge Using Octal Serial Flash Cache

This webinar will discuss the various solutions for storing and executing microprocessor code on a typical IoT system. Reducing power consumption, cost, and complexity without compromising performance is the charge of the IoT designer. Minimizing internal RAM and reducing the number of pins are two fundamental ways to reduce a chip’s power consumption. A key performance metric is the rate at which a microprocessor can access and execute instructions; this depends significantly on the system memory architecture. In response to the emerging IoT market, NVM manufacturers began to offer low-pin-count Flash memory devices that are accessed through a de-facto standard 4-wire SPI; more recent devices implemented SPI variants (Dual, Quad, Octal) which offer increasing levels of performance by parallelizing the data at the cost of additional pins. In this webinar, we will explore options for system memory (NVM and RAM) architecture available to today’s IoT system, analyze the benefits and detriments of each, and discuss quantitative performance differences among several approaches.

What attendees will learn:

  • Key challenges of IOT system design
  • Common IOT system architectures
  • Key components of an attractive IOT memory architecture
    • Octal SPI Controller (Silvaco)
    • Octal SPI NVM (Adesto)
    • FlashCache Controller (ARM)
  • Quantitative performance comparisons among different examples
    • System architecture variants (x5)
    • Example C software variants (x4)

Presenter

Errett Hogrefe is a Senior Digital Design Engineer in Silvaco’s IP Division. He is the architect, developer, and supporter of many digital cores in Silvaco’s IP portfolio, including SPI, Quad-SPI and Octal-SPI Controllers. He joined Silvaco in 2017 as part of Silvaco’s acquisition of SoC Solutions. During his 16 years at SoC Solutions, Errett gained expertise in digital IP and microprocessor-based systems through a wide range of engineering functions including digital architecture/design/development/verification, technical sales, FPGA prototyping, and embedded software development.

Errett holds a MS in Physics from Emory University and a BS in Physics and Mathematics from the University of Southern Mississippi.

When: December 18, 2018
Where: Online
Time: 10:00am-11:00am-(PST)
Language: English

WHO SHOULD ATTEND:

Architects, engineers, and management interested in achieving a lower-power, higher-performance IoT system.